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We are looking for a Chip-Design Verification Engineer to join our Switch Silicon team. As a Chip Design Verification Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a design and verification team that develops the front-end design for the Switch silicon core units.
Develop verification components and reference models, as well as verify and simulate chip blocks according to specifications under challenging constraints with a high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture and FW.

We are on the lookout for a dedicated and driven Software Engineer to join our dynamic VLSI Design Automation team. This team focuses on the development of VLSI CAD tools and web applications, and is responsible for managing and maintaining high-quality VLSI infrastructure, including compute and storage for the Backend Networking team. We seek a passionate engineer eager to effectively manage compute and storage, develop scripts, automate processes, and create dashboards and applications. Our ideal candidate is someone with experience in VLSI methodologies, data-driven, eager to learn, and possesses strong interpersonal skills.

What youll be doing:

Oversee and optimize compute and storage resources, ensuring operational efficiency and success of VLSI projects. Develop and maintain scripts and automation tools to streamline infrastructure tasks.

Engaging in the entire lifecycle of tool and web application development, which includes backend, frontend, data storage design, UI/UX design, testing, deployment, and maintenance.

Design, implement, and maintain dashboards for monitoring and reporting on infrastructure performance and usage.

Challenge existing VLSI methodologies to have better tools and flows.

We are looking for a best-in-class Chip Design HW Emulation Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in emulating our groundbreaking and innovative chips, enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company. Join our world-class emulation team in Israel. Our focused team takes Switches/NICs/SoCs designs and program the emulators to behave like our silicon. Are you ready to take on interesting problems and craft solutions? Come check out our team.

What you will be doing:

Responsible for emulation and prototyping of complex chip designs.

Define methodologies and develop infrastructure to enable fast integration of large chips into hardware emulation platforms.

Collaborate closely with design, verification, and software teams to support embedded and application software development.

Connect emulator/FPGA-based solutions to real external hardware or virtual targets.

Manage complex testbenches and support various hardware/software protocols.

Perform RTL design, verification, FPGA partitioning and implementation.

Develop scripts to automate flows and improve efficiency.

Bring up and debug designs in the lab environment.

Work in a cross-functional, hands-on engineering role that spans hardware and software domains.

We are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join Tel-Aviv / Beer-Sheva group, working in the field of encryption accelerators.

Lead a team of design and verification engineers responsible for the functional design and verification of complex silicon chips, ensuring the designs meet all functional, performance, power, and quality requirements before production.

This role involves strategic planning, hands-on technical leadership, cross-team collaboration, and process improvement within the chip development lifecycle.

Define verification methodologies and strategies, ensuring comprehensive coverage of functional, performance, and power requirements.

Plan and manage the team activities, including scheduling, resource allocation, and progress tracking to meet project milestones.

We are looking for a System/Network Test Engineer to join our End-to-End Cloud solution team. You are going to be part of the E2E Verification team with the main goal of testing and be part of defining the most sophisticated Ethernet/InfiniBand NIC and Switch features and topologies, which build fast enablement for the products to meet growing market demands. The ideal candidate will engage in testing and defining of Networking industry-leading systems and will bring with him an ability of the fast learning of new features, technologies, and protocols.

What you'll be doing:

Contribute to design review and product features requirements under the whole Ethernet/InfiniBand NIC & Switch portfolio and AI network.

Design and build setup topologies for appropriate product coverage with an emphasis on an emulation of customer large scale / complex environments.

Design requirements, for testing automation team, and implement tests for the new features, as part of our growing network switch and adaptors division.

Lead innovation approach by prepare and deploy different POC activities, based on the growing field demands.

Generate comprehensive test reports during release execution procedure, assist with reproduction and debugs complex customer use cases, with determination of the issue root cause, be an engineering PIC for the full verification cycles of the customer use cases fixes provided by R&D team.

Execute end-to-end test scenarios in different scopes: Regression, Performance, Functional and Scale; Report the progress of testing and provide summary reports of testing activity.

We are looking for best-in-class Chip Design Verification and Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Take a crucial part in developing our next-generation chip controller

Design and verification with challenging multi-discipline context

Take part in the development of all our networking and GPU networking chips and systems.

RF system Engineer (5866).
We are looking for an experienced RF system Engineer to lead the definition, design, and integration of advanced RF and communication systems.

Responsibilities:
Define and manage system requirements and architecture.
Lead system design, simulations, and performance analysis.
Conduct link budget and RF system trade-off studies.
Collaborate with RF, hardware, algorithms, and software teams.
Support integration, validation, and troubleshooting processes.
Prepare technical documentation and participate in design reviews.

Technical Project Manager (5865) We are seeking an experienced Technical Project Manager to lead the development and delivery of complex multidisciplinary Electronic Warfare (EW) projects from concept to deployment.

Were looking for a Physical Design Timing Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Leading Subsystem/IP Timing activities for complex Sub FullChip with several levels of hierarchies.
Timing rollup , analysis & of blocks & sub system levels & timing signoff on Function & Scan models on Sub FC /IP level.
Define timing signoff methodologies, corners, derates margins and improve QoR & convergence.
Involved in the chip design & architecture definition for both functional & DFT domain.
Serve as the technical STA lead while mentoring and guiding team members.

Were looking for a Physical Design STA Technical Expert to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Leading FC timing activities & methodologies for brand New SoC, from definition to TO.
Writing design constraints (SDC) for FC/IP/Block levels for all modes.
Involved in chip architecture definition for functional & DFT domains.
Working in close collaboration with the front-end & architecture team.
Working with engineers to identify and overcome roadblocks and obstacles.
Defining AC timing from spec to implementation.
Supporting complex clock structures.

Were looking for a Physical Design Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block or IP owner from RTL to GDS with horizontal domain ownership.
Collaboration with front-end and architecture teams to address issues, define design methodologies and improve QoR & convergence.
End to End ownership from Synthesis, DFT insertion, Floor Planning , Place & Route till signoff.
Signoff on all domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.
Exploratio of different methodologies from P&R till signoff to improve PPA & Turnaround time.
Evaluation of new technologies tools & features and to bring innovation with significant RoI.
Technical support and mentoring the engineers in the team.

Were looking for a Physical Design Engineer to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS.
Floorplan exploration with guidance and collaboration with front-end and architecture teams.
STA: work with FE and floor planner to manage block and top level constraints and 1st level of timing analysis.
Synthesis exploration and final synthesis netlist: Scan insertion @ synthesis, clean checks from Lint, UPF & Spyglass.
Place & Route: from Synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

Were looking for a Physical Design CAD Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Lead the development of flows & methodologies from Synthesis, Place & Route & All signoff flows.
Plan & execute flow releases, coordinate & track development tasks between the team.
Exploration of different methodologies from P&R till signoff to improve PPA & Turnaround time.
Evaluation of new technologies tools & features and to bring innovation with significant RoI.
Serve as the technical lead while mentoring and guiding team members.

Were looking for a Physical Design CAD Expert to join the growing Technology Methodology & Execution team, that is responsible for developing both Technology Methodologies & Flows for all products and processes and the execution of complex Subsystems/IPs for our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Participate in the development of flows & methodologies from Synthesis , Place& Route & all signoff flows.
Plan & execute flow releases, coordinate & track development tasks.
Exploration of different methodologies from P&R till signoff to improve PPA & Turnaround time.
Evaluation of new tools features and methodologies to bring innovation with significant RoI.
Hands-on physical design block ownership end to end, from Synthesis floor planning, Place & Route with target to achieve best PPA.
Signoff on all domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.
Serve as the technical lead while mentoring and guiding team members.