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The Content Safety Team, which is responsible for ensuring a safe environment for our customers, is seeking a Senior AI Scientist. The team develops content moderation solutions for user-generated and AI-generated content across all our products and utilizes advanced GenAI tools to build capabilities such as automatic labeling.

Responsibilities:
Develop and refine content moderation models to filter and tackle abusive content across various products, content types and modalities.
Work extensively with NLP algorithms, focusing on fine-tuning transformers and large language models (LLMs) to enhance accuracy and efficiency.
Explore and integrate advanced technologies such as Retriever-Augmented Generation (RAG) and Agentic AI to assist in the automatic labeling and classification of data.
Collaborate with a multi-disciplinary team including machine learning engineers, AI scientists, and policy experts to ensure models align with ethical standards and company policies.
Stay updated with the latest research in AI and machine learning to incorporate cutting-edge techniques into content moderation strategies.
Prepare and maintain documentation on model development, configurations, and performance metrics for both technical and non-technical audiences.
Mentor and guide junior AI scientists, fostering a collaborative and productive team environment.

Our EyeC RADAR department develops high-performance 4D imaging radar systems for autonomously driving vehicles.
The PHY algo group is leading the innovative research and the development of the entire algo processing pipeline starting from the IQ samples and up to object detection. The group is responsible for the entire radar simulation, including novel waveform design, transceivers, environment, and the radar signal processing pipeline. The group is also leading the PHY architecture and developing AI based signal processing.
You will be in charge for ensuring the quality, performance and reliability of our algorithms.
What will your job look like?
Define test plan for new algorithms
Develop performance metrics for RADAR signals
Build automated testing systems for RADAR performance based on field data and simulations
Analyze field recorded data
Perform root cause analysis for algorithmic fails.

our company, a world leader in driver assistant systems and autonomous vehicles, is looking for talented silicon validation engineer for the range of its next generation SoCs supporting its radar systems
Our team is responsible for validating our company's radar SoCs, utilizing Pre-Silicon environments, as well as Post-Silicon platforms.
We are developing fully embedded C++ based validation environment for our needs.
You will be taking part in developing anything from environment and drivers through system modules such as file system, network stack, memory management and more, and up to complex automation tools in both C++ and python.
What will your job look like
Get a deep understanding of our chip hardware IP blocks, both analog and digital.
Develop our validation environment.
Develop, port, or add features to the product drivers using Technical Specs and existing modules.
Define, develop and execute various complex validation scenarios on the SoC.
Debug complex SoC problems using embedded GDB, JTAG probes, going down to signal level using scopes.
Take part in Next Gen SoC's Power-On's and platforms Bring-Up's.
Collaborate with other SW/Embedded and HW/Electrical Validation teams across the company.

Which team will you join?
our company EyeC VLSI team - a group designing the chips for Radar systems for ADAS and autonomous cars. The group is responsible for all disciplines of VLSI development, including but not limited to Logic Design, Design Verification, Microarchitecture, Analog and circuit design and layout, Physical and structural design (backend), Product and test engineering.
What will your job look like:
You will take a central hands-on role in Design Verification.
Define Environment micro-Architect, Implement complex UVM environment, Build vPlan .
Execute coverage implementation.
Be part of external IP verification and Internal custom IP.
Be part of System definition and top-level activity.
Take part in Silicon bring-up.

The Radar VLSI team at our company EyeC is looking for an experienced Formal Verification Engineer to join us! This is a newly established team with a mission to integrate Formal Verification as a key methodology in Radar projects. Be part of a cutting-edge group designing chips for radar systems in ADAS and autonomous vehicles, where your expertise will have a significant impact.
What will your job look like:
You will verify unique and complex design blocks.
Help determine the Formal strategy and methodology for the team.
Explore new Formal methods and tools.

The Radar VLSI team at our company EyeC is looking for an experienced Formal Verification Engineer to join us! This is a newly established team with a mission to integrate Formal Verification as a key methodology in Radar projects. Be part of a cutting-edge group designing chips for radar systems in ADAS and autonomous vehicles, where your expertise will have a significant impact.
What will your job look like:
You will verify unique and complex design blocks.
Help determine the Formal strategy and methodology for the team.
Explore new Formal methods and tools.