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Required Senior Hardware Test Engineer
Description
The Senior Hardware Test Engineer is responsible for developing, implementing, and sustaining test processes and equipment used in the manufacturing of hardware products. This role ensures that products meet quality, reliability, and performance standards through robust test strategies, automation, and continuous improvement. The engineer acts as a bridge between design engineering, manufacturing operations, and quality assurance, supporting new product introductions (NPI) through to mass production and sustaining phases.
This is a great opportunity to be part of one of the fastest-growing AI infrastructure companies in history, an organization that is in the center of the hurricane being created by the revolution in artificial intelligence.
Role and Responsibilities:
Test Development & Validation:
Design, develop, and implement test plans, test fixtures and infrastructure.
Collaborate with R&D to define test requirements early in the product lifecycle.
Develop test scripts and automation software (Python, LabVIEW, C#, etc.) to improve coverage and efficiency.
Validate test coverage, yield, and reliability through statistical analysis (GR&R, Cpk, SPC).
New Product Introduction (NPI):
Support EVT, DVT, and PVT phases with test readiness and execution.
Lead test process transfer to contract manufacturers (CMs) or ODM partners.
Train CM engineers/technicians on test systems and procedures.
Ensure compliance with safety, regulatory, and customer requirements.
Manufacturing Support & Continuous Improvement:
Monitor production test yields, debug failures, and drive root cause analysis (RCA).
Implement corrective actions and continuous improvements to reduce test time, cost, and false failures.
Maintain and calibrate test equipment and fixtures.
Support ECO (Engineering Change Orders) by updating test plans and equipment accordingly.
Cross-Functional Collaboration:
Work closely with hardware, firmware, and reliability engineers to improve product testability and robustness.
Partner with Quality and Operations to ensure smooth scaling into mass production.
Engage with suppliers and CM partners on test strategy alignment.

we are revolutionizing maritime operations with cutting-edge computer vision, augmented reality, and autonomous technologies. Our mission is bold: make ocean shipping safer, more efficient, and significantly greener.
From real-time navigation assistance to AI-driven insights that reduce fuel consumption and prevent collisions, were building a future where ships sail smarter. Join our growing team and help shape the next generation of intelligent maritime systems used by leading fleets across the globe.
The Role
Were looking for a Senior Software Engineer with a passion for solving tough technical challenges, working across the stack, and building systems that matter. This is your opportunity to work on an advanced, real-world product involving computer vision, edge computing, and scalable cloud architecture.
What Youll Do
Design and implement robust, scalable components across the software stack.
Take end-to-end ownership of complex features-from concept to deployment.
Collaborate with product managers, system engineers, and AI researchers to build integrated solutions.
Contribute to a high-performance platform that combines real-time sensor data, video analytics, and cloud services.
Build and maintain CI/CD pipelines and automated test frameworks.
Lead with quality-writing clean, testable code and applying TDD principles.
Mentor teammates, share knowledge, and help set best practices across the team.

We are looking for an entrepreneurial Engineering Team Lead to spearhead the development of a brand-new product line within our company.
This is a unique "0 to 1" opportunity: you will design the architecture from the ground up, recruit your own team of talented engineers, and define the engineering culture for this new unit. You will join a company backed by top-notch investors and industry leaders, with a product already live in over 15 countries and high scale-but you will operate with the agility and ownership of a founder.
What You'll Do
Build & Lead the Team:
Recruit & Grow: Hire, onboard, and mentor a new team of highly talented engineers from scratch.
Culture: Foster a culture of technical excellence, open collaboration, and rapid iteration.
Standards: Conduct code reviews and set the standard for code quality, maintainability, and testing.
Architecture & Development (Hands-on):
0 to 1 Design: Lead the design and implementation of a complex data processing system from scratch, analyzing visual data and integrating with our existing platforms.
Hands-on Coding: Remain hands-on (approx. 50-60% coding initially), developing core features mainly in Python while laying the architectural foundations.
Scale & Strategy: Make key technology choices that will impact the product's long-term scalability and performance.
Product Delivery:
Impact: Tackle complex real-world problems that directly affect the companys success.
Collaboration: Work closely with Product Managers and software teams to translate complex business requirements into scalable technical solutions.
Delivery: Drive the delivery timeline, balancing speed-to-market with robust engineering practices.

Take part in developing the worlds leading ecosystem-security solution
Address security, scalability, and performance challenges
Work closely with other team members, provide technical leadership
End-to-end ownership of features, from design through development and deployment
Take part in uncovering and resolving critical vulnerabilities for some of the biggest companies out there

As a Design Verification Engineer, you will be responsible for ensuring "bug-free first silicon" for complex IP and SoC designs. You will drive all phases of pre-silicon verification, from defining methodologies and test plans to RTL freeze and tape-out sign-off. These roles are highly collaborative, requiring close interaction with architecture, design, and software teams across global sites.
Responsibilities
Architect and develop scalable, portable verification environments, including UVM-based testbenches, protocol monitors, agents, and checkers.
Define detailed test and coverage plans based on micro-architecture specifications and extract features for DV attributes.
Create and simulate test scenarios, perform advanced debugging, and conduct end-to-end simulations of data/control paths.
Drive regression and coverage analysis (metric-driven verification) to ensure the highest quality, productivity, and time-to-market.
Partner with architects and designers from the early stages of feature definition to influence IP/SoC specifications.
Apply formal verification, hardware acceleration, and power/performance (NLP) analysis where applicable.

The Documentation Team is seeking a Senior Technical Writer to own the end-to-end documentation strategy across multiple platform domains. You will act as a strategic partner to Product and R&D, translating complex engineering concepts into intuitive user guides and high-impact microcopy. Operating in a high-velocity Agile environment with weekly releases, you will drive content excellence while leveraging AI-driven workflows to scale our global documentation footprint.

Responsibilities
Direct the documentation lifecycle for complex platform features, adapters, and weekly release notes across three distinct product squads.
Collaborate with Product Managers and R&D to translate high-velocity technical updates into clear, actionable documentation for enterprise users.
Design and edit intuitive UI copy to guide users through complex cybersecurity workflows and platform interfaces.
Manage high-volume content switching between Platform, Cyber-Physical Assets, and Asset Management domains with timely delivery.

You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

* Manage and build a world class team managing ASIC design, micro-arch, SDC constraints and integration efforts of the project.
* Translate high level goals to measurable plans and milestones. Lead RTL design, quality checks, and manage schedule for on-time delivery of key IPs.
* Work with verification and physical design teams to achieve high quality design.
* Interface with IP teams and manage schedule and delivery of IPs for successful TO.
* Guide and mentor junior engineers as required.
* Hire and retain tier one engineers and foster teamwork with cross functional collaboration.
* Build a culture of execution excellence coupled with innovation.
* Build a team of hard-working and passionate leaders as we scale.
* Maintain close interactions with NPI, Packaging, DFT, Architecture teams.
* Own power, performance and area optimization of design.

we are looking for an AI Platform Engineer to revolutionize engineering productivity and drive AI-powered innovation across the organization. This role is part of our Platform Engineering initiative, focused on enabling engineers and product teams with cutting-edge AI tools, intelligent automation, and scalable AI platforms.
If youre an innovator at heart, passionate about applying AI to solve complex engineering problems, and thrive in an environment that values experimentation, ownership, and entrepreneurship-this role is for you.
Responsibilities
Develop and integrate AI-powered solutions that enhance engineering productivity, automate workflows, and improve developer efficiency across the organization.
Evaluate, prototype, and implement state-of-the-art AI platforms using latest models and frameworks (e.g., ChatGPT, Claude, Gemini, LangGraph, Librechat, AWS Agentcore Bedrock) to address engineering and operational challenges.
Design, build, and maintain AI-driven internal platforms, including knowledge management systems, AI-enhanced coding assistants, intelligent automation tools, and AI-powered chatbots.
Collaborate closely with engineering, DevOps, and product teams to embed AI capabilities into everyday development workflows.
Lead Proof-of-Concept (PoC) initiatives, experimenting with LLMs, generative AI, and automation frameworks to deliver tangible business impact.
Research emerging AI trends, tools, and models, and translate them into practical, production-ready solutions.
Build and operate scalable AI infrastructure that integrates with cloud environments and existing engineering toolchains.
Promote a culture of innovation by empowering teams to adopt AI-driven solutions and sharing knowledge and outcomes across the organization.

physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.

our company is seeking to hire an excellent firmware engineer to join the gpu networking (nvlink) fw group in tel-aviv / raanana. you will have the opportunity to take part in designing, implementing, and driving major development firmware features, delivering the next-generation gpu networking products.
we drive the data growth of the worlds biggest companies. with dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. are you ready for the challenge?
what you will be doing:
design and implement new features in the core of our gpu firmware.
collaborate with architecture and different software design teams throughout the software development lifecycle.
work in pre & post-silicon development environments of next-generation our gpu products.
gain a deep understanding of system debugging, networking technology, and stacks, as well as the hw/fw/sw relationship.
innovate! bring our fw switching products to shine in customers view.
collaborate with other r&d teams around the globe.

our company has been elevating computer graphics, pc gaming, and accelerated computing for more than 25 years. today, were tapping into the unlimited potential of ai to define the next era of computing. as an employee, youll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. come join the team and see how you can make a lasting impact on the most groundbreaking technologies.
our networking bu group is seeking to hire an expert firmware design engineer for the ethernet switch firmware core team. the next generation of switches are a crucial component of the most innovative ai and cloud computing networks in the world. as a member of the ethernet firmware team, you will craft and develop the firmware abstraction layer in the eth switch. this role will require you to participate in the design & development of firmware while working closely with hardware and architecture team to ensure timely delivery of our products to the market.
what you'll be doing:
highly involved in the entire software development process from architecture to integration testing of firmware for the spectrum asic product line.
work with hw & asic team to provide insights into developing the next gen of the groundbreaking of silicon and systems.
design and implement algorithms to improve system scale and performance.
work with higher layer software teams to debug issues reported by customers (internal and external).
design, implement and integrate new features according to the product roadmap.
have a new insight on how to improve our software? why not! bring your ideas to life by innovating during our hackathons
collaborate with other r&d teams around the globe.

looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part inflows development.

we are looking for a chip-design Verification engineer to join our switch silicon team. as a chip design Verification engineer at םור networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a design and verification team that develops the Front-End design for the switch silicon and the gpu.
develop verification components and reference models, as well as verify and simulate chip blocks according to specifications under challenging constraints with a high orientation to power, area, and performance.
work closely with multiple teams within organizations such as architecture, micro- architecture and fw.

looking for a best-in-class chip design - hw emulation senior engineer to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. join world-class emulation team in israel. our focused team takes switches/nics/socs designs and program the emulators to behave like our silicon. are you ready to take on interesting problems and craft solutions? come check out our team.
what you will be doing:
the main responsibility is emulation and prototyping of complex chip designs. this includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.
the job also requires close collaboration with design, verification, and software engineers to enable Embedded software and application software development.
connecting emulator/fpga based solutions to real external h/w or virtual targets, taking care of complex testbench and different protocols.
this is a role for a versatile engineer that includes rtl design, verification, fpga partitioning and implementation, scripting, and lab-based bring up of the design.