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לפני 10 שעות
חברה חסויה
Location: Tel Aviv-Yafo
We are looking for a technically skilled, customer-facing Integration Engineer to join our team at Riskified.
In this role, you will work closely with global enterprise merchants, primarily during the post-sales journey, while occasionally supporting pre-sales technical discussions.
You will be responsible for leading customers through the end-to-end technical integration process, from initial discovery and solution design to implementation, testing, and successful go-live.
The position combines technical expertise, customer engagement, solution architecture, and project management, requiring the ability to understand complex merchant environments and translate business requirements into scalable technical solutions.
What You'll Be Doing:
End-to-End Integration Ownership: Lead technical integration projects with international enterprise customers, from initial onboarding and technical scoping through implementation, testing, and production launch.
Customer-Facing Technical Leadership: Act as the primary technical point of contact for merchants throughout the integration lifecycle, ensuring clear communication and alignment between technical and business stakeholders.
Technical Architecture & Solution Design: Develop a deep understanding of each customer's technical architecture, infrastructure, and business flows, and determine how Riskified's APIs, SDKs, and solutions can be integrated effectively.
API & SDK Integration: Guide customers through API and SDK implementations, troubleshoot integration challenges, and ensure adherence to technical requirements and best practices.
Technical Project Management: Drive integration timelines, coordinate dependencies, identify potential risks and blockers, and ensure projects progress toward successful go-live milestones.
Cross-Functional Collaboration: Work closely with internal teams, including R&D, Product, Customer Success, and Sales, to resolve technical challenges and deliver a seamless customer experience.
Pre-Sales Technical Support: Occasionally participate in technical discovery sessions and solution discussions with prospective customers, evaluating integration feasibility and architectural requirements.
Problem-Solving & Troubleshooting: Investigate complex technical issues, analyze API requests and responses, and provide praסctical solutions throughout the integration process.
Requirements:
3-5+ years of proven experience in a customer-facing technical role, such as Integration Engineer, Solutions Engineer, Technical Implementation Engineer, or Technical Account Manager.
Strong understanding of REST APIs, SDKs, HTTP protocols, JSON, webhooks, and system integrations.
Ability to understand and analyze complex customer architectures, system dependencies, and end-to-end data flows.
Demonstrated experience leading technical integration or implementation projects with international enterprise customers.
Strong technical project management capabilities, including managing timelines, stakeholders, dependencies, and multiple concurrent projects.
Excellent communication skills, with the ability to explain complex technical concepts to both technical and non-technical audiences.
Strong analytical thinking, troubleshooting abilities, and a proactive, solution-oriented mindset.
Ability to work independently, take ownership, and operate effectively in a fast-paced, cross-functional environment.
Fluent English, both written and spoken.
This position is open to all candidates.
 
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24/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Principal DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a Principal DFT Engineer, you will provide technical leadership across the full DFT lifecycle-from architecture and specification through implementation, verification, and silicon bring-up. You will define and drive DFT strategy, establish robust methodologies, and lead execution to ensure high test quality and manufacturability. This role requires deep expertise, cross-functional influence, and the ability to drive DFT excellence across projects and teams.
This is a critical leadership position with high impact on first-pass silicon success and production quality for next-generation AI connectivity solutions.
Key Responsibilities

DFT Architecture & Technical Leadership
Define and own DFT architecture for complex SoCs, including Scan, MBIST, LBIST, JTAG/iJTAG, and ATPG strategies.
Lead DFT planning, specification, and quality tracking across the project lifecycle.
Provide technical leadership and drive DFT sign-off readiness to ensure successful tapeout.

Execution Across the Full Lifecycle
Lead DFT implementation, integration, and verification at block, full-chip and chiplet levels.
Own end-to-end DFT activities from specification through silicon bring-up and production support.
Ensure high test coverage, robust pattern generation, and alignment with manufacturing requirements.

Methodology & Cross-Functional Impact
Develop and drive scalable DFT methodologies, flows, and automation frameworks.
Collaborate closely with RTL, Physical Design, STA, and Test Engineering teams to ensure design-for-test readiness.
Optimize DFT integration across front-end and backend flows to improve quality, PPA, and turnaround time.
Requirements:
Basic Qualifications
Bachelors degree in Electrical Engineering or related technical field (Masters preferred).
12+ years of experience in DFT design, implementation, and verification for complex ASIC/SoC designs.
Proven experience in leading DFT activities across full chip development cycles.
Deep expertise in DFT techniques including Scan, MBIST, LBIST, JTAG/iJTAG, and ATPG.
Strong understanding of DFT and Physical Design flows, including timing implications and integration challenges.
Experience with industry-standard DFT tools (Siemens Tessent, Synopsys TestMAX or equivalent).
Solid experience with DFT verification methodologies and coverage analysis.
Strong scripting skills (Tcl, Python, or Perl) for automation and flow development.

Preferred Qualifications
Experience with advanced process nodes (7nm and below).
Background in high-speed connectivity designs (PCIe, Ethernet, CXL, or similar).
Experience with hierarchical DFT methodologies and large multi-die or chiplet-based systems.
Knowledge of silicon bring-up, production test flows, and yield optimization.
Familiarity with STA, low-power design, and CDC as it relates to DFT integration.
Strong leadership and communication skills, with ability to influence cross-functional teams globally.
This position is open to all candidates.
 
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24/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Silicon Technical Program Manager to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, leading the physical implementation strategy for chips that power the world's largest AI clusters.

As an Technical Program Manager, you will be the key architect of our silicons operational reality. You wont just track timelines - you will help establish our local execution culture and technical standards, owning the cross-functional journey of transforming complex logic into high-performance silicon.

Key Responsibilities
Drive and manage ASIC development and subsystems from concept through to production in collaboration with internal teams and external vendors.
Provide hands-on program management throughout the full development cycle of silicon and firmware, including concept, design, development, fabrication, validation, and production release.
Work closely with the software, hardware, and architecture teams to align with product requirements and ensure all constraints are met.
Lead process improvements across multiple teams and functions to drive better collaboration and efficiency.
Independently manage complex projects with minimal supervision, ensuring timelines and milestones are met.
Deliver high-quality ASIC solutions products while collaborating with product management and architecture teams.
Requirements:
Basic Qualifications
Bachelor's degree in Computer Science, Electrical Engineering, or a related technical field.
8+ years of experience in ASIC development and 3+ years in Program or Product Management or Technical/Engineering management.
Proven leadership skills, with the ability to manage projects from technical details to the big picture.
Experience in managing ASIC design flow, RTL, synthesis, functional verification, and physical layout.
Experience in pre-silicon testing (Emulation, FPGA) and post-silicon validation is preferred.
Excel in interpersonal communication, relationship building, and collaboration within cross-functional teams.
Excellent organizational and leadership skills, and are capable of multitasking in a fast-paced environment.

Preferred Qualifications
Familiarity with Networking technologies and concepts.
Excellent strategic planning and communication skills, with a self-motivated focus on execution.
This position is open to all candidates.
 
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6 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now expanding into a significant new market, and we're looking for an exceptional individual to lead the product definition and architecture of this effort. This is a rare opportunity to operate with the resources and credibility of an established, well-funded quantum technology company with hundreds of customers, while being part of the core team that builds something from the ground up. This role sits within a nascent, fast-growing initiative - early enough that there is still real room to shape the roadmap, the architecture, and the team itself. You will lead both the product definition and the technical architecture for a new capability, working closely with QM's broader organization (Product, Architecture, R&D) to turn a clear technical direction into a shipped solution
We are seeking an enthusiastic individual with product management experience and a strong grasp of evolving quantum technologies, fabrication processes and solutions. The ideal candidate will provide market insights, define requirements for the product, shape the solution architecture and collaborate closely with QM product, architecture and R&D teams, as well as with QM partners, customers and prospects.
Key Responsibilities:
Product Ownership: Define and manage product requirements, launch plans, and roadmap for a new capability.
Architecture & Technical Direction: Own the technical architecture end-to-end, from core building blocks through to a complete, customer-ready solution, and make the build-vs-buy-vs-integrate calls that shape it.
Domain Expertise: Leverage deep expertise in quantum computing and quantum computing fabrication processes to inform decision-making and roadmap planning.
Cross-Functional Leadership: Lead cross-functional teams across hardware, software, and packaging, and influence stakeholders to ensure successful delivery.
Customer & Market Engagement: Act as a technical point of contact externally, translating customer and market insight directly into product and architecture decisions.
Partner Engagement: Build and own relationships with external hardware and equipment partners to track and help shape emerging capability relevant to the initiative.
Requirements:
Familiarity and experience in quantum computing technologies and fabrication processes - Must
Proven product and/or technical leadership experience - Must
High technical acumen and the ability to comprehend and make trade-offs within complex systems - Must
Comfort with ambiguity - this role is not for someone who needs a fully-formed playbook - Must
Excellent communication skills in English, both written and oral - Must
Strong organizational skills and a high degree of independence - Must
Team player with the ability to collaborate closely with other teams - Must
Product management experience, with a track record of driving product vision and architecture - Strong Advantage
Ph.D. or M.Sc. in Physics or Electrical Engineering; experience in experimental quantum computing - Strong Advantage
Hands-on experience with qubits or QPUs (the more of the following, the merrier): Quantum device physics, cryogenics, control electronics, control software, materials and processes - Strong Advantage
Experience in system architecture, with a preference for system architecture experience in quantum computing - An Advantage
Past experience in working in a rapidly growing start up environment - An Advantage
Willingness to travel for customer engagement .
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
As a Technical Project Manager, you will drive the planning, execution, and delivery of key cross-domain initiatives across Product and R&D. As part of our Product organization, you will act as a key connector between Product, R&D, QA, and Operations, ensuring teams are aligned and execution stays on track. You will navigate complex dependencies, remove blockers, and drive initiatives from early-stage 0-to-1 products through large, multi-quarter projects in a dynamic and fast-paced environment.

What youll do:

Lead Cross-Domain Initiatives: Own end-to-end execution of complex initiatives across multiple Product and R&D teams, managing dependencies, risks, priorities, and timelines.
Define the Solution: Take an active part in defining the solution together with the Product Lead and R&D Lead, so the plan is shaped with the people who will build it and own it.
Plan & Align: Take an active role in quarterly planning - OKRs, capacity, and roadmaps - and partner closely with Product and R&D leaders on execution plans.
Run the Delivery Discipline: Apply project management practice consistently across your programs: progress tracking, planning and timeline management (including Gantt views), capacity planning, risk assessment, and scope and change control.
Own External Commitments: Track and protect the commitments that carry an outside deadline - a client at risk, a launch date agreed with a partner - and surface their real status early enough for the organization to act on it.
Drive Execution: Turn strategy into action, resolve complex bottlenecks, and balance business priorities against technical constraints so teams can make clear, practical decisions.
Requirements:
Experience: 3+ years in technical project or program management within a high-tech R&D environment, on R&D or product projects.
Cross-Team Delivery: Proven experience driving initiatives across several teams with real interdependencies - not delivery within a single team.
Project Management Craft: Hands-on with Agile and the software development lifecycle, and fluent in the practice behind it - planning, dependencies, risk and change control. Comfortable in Jira, Confluence and planning tools.
Technical Depth: Technological background, academic or professional, with the aptitude to dive into system architecture, technical challenges, and solution discussions with R&D teams.
Matrix Management: Ability to influence and align teams and stakeholders without direct authority, and to communicate status clearly to developers and management alike.
Ownership & Drive: A proactive, hands-on approach - including picking up in-flight projects and quickly building an accurate picture of status and risk.
Adaptability: Comfortable running several projects in parallel where priorities shift within the quarter.
Education & English: University degree, B.Sc. preferred. Professional English, strong enough to lead calls with international partners and write updates read by management.
This position is open to all candidates.
 
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23/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Senior Product Engineer to join a global team of a Product Engineers that own a technical success and customer satisfaction across multiple high-impact projects. This role is deeply rooted in data analytics; youll be working at the intersection of silicon, systems, and software to deliver high-value insights to customers.

Responsibilities
Performing post-silicon and system-level data analysis and providing insights on data extracted from post-silicon stages.
Supporting customers with analytics platform problems solving and new features introduction.
Drive integration of our analytics platform within customer environments, bridging silicon, test, and system-level domains.
Collaborate with R&D and data science teams to develop, validate, and improve advanced analytics algorithms.
Troubleshoot complex silicon/system issues through data-driven insights.
Partner with internal stakeholders (design, software, product) to influence roadmap and execution.
Act as a technical professional in customer onboarding, support, and ongoing engagement.
Requirements:
Requirements
B.Sc. or M.Sc. in Electrical Engineering or a related discipline.
3+ years in IC/system product, test, or yield engineering, including deep post-silicon analytics experience.
Strong track record in data analysis and root-cause debugging at the system or silicon level.
Deep understanding of IC manufacturing, characterization, and qualification processes.
Excellent communication and interpersonal skills - especially in customer-facing situations.
Strong organizational and prioritization skills with a results-oriented mindset.
Fluency in English (written and verbal) is a must.

Preferred Qualifications
Expertise in data analytics platforms (e.g., JMP, Python, or similar).
Experience in ATE test development or digital simulation tools (e.g., HSpice, PrimeTime)- advantage.
Background in silicon lifecycle management, reliability physics, or embedded monitoring.
Familiarity with cloud platforms or ML-based analytical solutions is a plus.
This position is open to all candidates.
 
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14/10/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for exceptional talent to join our team as a Hardware Engineer.
Your Day to Day:
Lead end-to-end hardware development, from architecture and design to testing and production
Design and develop complex electronic systems, including schematics, PCB layout guidance, and component selection
Drive system integration, bring-up, debugging, and validation processes
Collaborate with firmware, software, mechanical, and product teams to ensure seamless system performance
Identify technical risks and propose effective mitigation strategies
Support manufacturing, including design for manufacturability (DFM) and design for testability (DFT)
Analyze and improve system performance, reliability, and cost
Mentor junior engineers and contribute to team knowledge sharing
Requirements:
BSc or MSc in Electrical Engineering or a related field
7+ years of experience in hardware development in high-tech industries
Strong experience with analog and digital design
Proven track record of taking products from concept to production
Hands-on experience with lab equipment (oscilloscopes, spectrum analyzers, logic analyzers, etc.)
Experience with schematic capture and PCB design tools
Strong debugging and problem-solving skills
Ability to manage multiple projects in a dynamic environment
Experience with high-speed interfaces, RF systems, or sensor technologies
Hands-on experience with Altium Designer and familiarity with AMD SoC platforms - Advantage
Familiarity with embedded systems and firmware integration
Experience working with contract manufacturers and NPI processes
Knowledge of industry standards and compliance requirements
Fluent in English, both verbal and written
This position is open to all candidates.
 
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30/09/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our networking is a world-leader in building the most powerful supercomputers in the world which drive the AI and HPC industry. These rely on high performant network ASICs which connect GPUs at scale for efficient data transfer and compute. We are looking for a hardware performance modeling architect to join our team and build a network simulator used for the design, optimization and exploration of our future networking chips. The role is cross-disciplinary, collaborating with hardware and software teams across the wider company. You will solve complex problems, develop innovative solutions and be instrumental in determining the architecture of our next generation networking solutions.

What you'll be doing:

Define the Network Adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). Work with related industry standards & customers on deploying your tech.

Collaborate with teams across teams (physical design, logic design, system software, firmware, applications)

Develop cycle-accurate simulation components to evaluate and analyze micro-architecture and architectural options.

Explore innovative ideas to improve and optimize our chip systems performance.

Serve as a focal point within the organization and distribute the knowledge that you acquire.
Requirements:
What we need to see:

BSc/MSc in Electrical Engineering, Computer Science from a known university.

Experience in developing simulation models.

4+ years of experience in a relevant role as chip architecture or system integration

Knowledge and understanding of computing and networking systems.

Strong debug skills.

A can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn complex concepts in a fast pace environment.

Utmost passion for attention to details in design and a high focus on design quality.

Ways to stand out from the crowd:

Experience and love for system architecture, CPU/GPU/Memory/Storage/Networking.

We are widely considered to be one of the tech worlds most desirable employers.

Master's degree in Electrical Engineering, Computer Science or related technical field.

5+ years of relevant practical experience.

Experience with network simulation tools (omnet, ns3, sst, gem5).
This position is open to all candidates.
 
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28/09/2026
חברה חסויה
Location: Tel Aviv-Yafo and Ra'anana
Job Type: Full Time
We are looking for a creative and motivated Software Engineer to join our SONiC open source NOS team. Our team is responsible for the design and integration of SONiC across our Networking products. In this role, youll have the opportunity to work on next-generation, high-speed networking solutions for AI data centers, contribute to open-source projects, and collaborate with experts across us and the broader SONiC community.

Youll help lead the development of new SONiC networking features and chassis management capabilities across our Networking products. Were looking for someone who enjoys solving complex technical challenges, learning quickly, and collaborating in a dynamic and diverse team environment.

What youll be doing:

Design, integrate, and deliver new features as part of the SONiC release train across our Networking products.

Develop networking and chassis management capabilities for next-generation platforms.

Work in a Continuous Deployment environment with fast development and deployment cycles.

Collaborate with experienced teams across our Networking and with members of the broader SONiC open-source community.

Develop high-quality, production-ready code that is published and reviewed in leading open-source environments.

Take ownership of features from design and implementation through integration and delivery.
Requirements:
What we need to see:

B.Sc. in Computer Science, Electrical Engineering, or a related field, or equivalent practical experience.

3-5 years of software development experience.

Understanding of networking concepts and protocols.

Experience with C++ and Python

Experience using AI development tools or building AI agents.

Strong technical problem-solving skills and the ability to learn new technologies quickly.

A collaborative mindset with strong communication and interpersonal skills.

Ways to stand out from the crowd:

Hands-on experience with L2 and L3 networking protocols.

Experience with SONiC, SAI, or other open-source networking projects.

Experience with Rust.

Familiarity with Linux and shell scripting.

Experience working with Scrum or other Agile development methodologies.
This position is open to all candidates.
 
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24/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Junior Physical Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the backend execution and methodologies for chips that power the world's largest AI clusters.

As a Junior Physical Design Engineer, you will be a key architect of our silicon's physical reality. You won't just execute a flow-you will help establish our local execution culture and technical standards, owning the transformation of complex logic into high-performance silicon. You will drive the physical implementation journey from synthesis through signoff, ensuring our connectivity solutions meet the extreme performance, power, and area targets required for next-generation AI infrastructure. If you thrive on solving complex challenges in deep-submicron processes and want to shape the backend methodology for AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Physical Implementation & Execution
Be part of the founding Backend team in Israel, playing a critical role in establishing local execution culture and technical standards
Take full responsibility for physical implementation journey including Synthesis, Floorplanning, Place & Route, and Clock-Tree Synthesis (CTS)
Own macro-level implementation with deep hands-on experience in floorplanning and complex routing.

Signoff & Design Integrity
Drive final stages of design integrity, owning Timing signoff (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR)
Ensure first-pass silicon success through rigorous signoff flows and analysis
Apply Logic Equivalence Checking (LEC) and other verification techniques to guarantee design correctness.

Methodology Development & Cross-Functional Collaboration
Participate in defining and refining Backend methodologies with autonomy to improve workflows and tool automation.
Work closely with Architecture, Design, and DFT teams to navigate challenges of advanced process nodes and high-speed connectivity.
Leverage scripting and automation to make engineering environment faster and more robust.
Requirements:
Basic Qualifications
Bachelors degree in Electrical Engineering or a related technical field.
Foundational understanding of the RTL-to-GDS flow, with academic or internship exposure to areas such as floorplanning, placement, and routing
Familiarity with advanced process technologies (e.g., 7nm and below) through coursework or hands-on projects.
Basic experience with signoff methodologies and tools, including STA, Logic Equivalence Checking (LEC), DRC, and EMIR analysis.
Working knowledge of TCL or Python scripting for simple automation and support of EDA tool flows.

Preferred Qualifications
Experience with full-chip level implementation and integration.
Knowledge of Power and Noise analysis (SI/PI) to optimize high-performance silicon.
Familiarity with Design-for-Test (DFT) requirements and their impact on physical layout.
Experience with industry-standard EDA tools (Synopsys Fusion Compiler/ICC2, Cadence Innovus).
Background in high-speed interface designs or connectivity protocols.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8831900
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24/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a DFT Engineer, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.

Key Responsibilities

DFT Architecture & Strategy
Be part of the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards
Design and implement DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG for high-end devices

Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance
Drive test coverage and quality metrics to meet stringent manufacturing requirements

Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR
Participate in developing and maintaining cutting-edge DFT implementation flows
Automate and improve methodologies using advanced scripting and tools
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering or related technical field.
4+ years of hands-on experience in DFT roles at semiconductor companies.
Experience in DFT flows and architectures including JTAG/iJTAG, MBIST, Scan, and ATPG.
Good understanding of logic design, verification, debug, and Static Timing Analysis (STA).
Scripting proficiency in Tcl, Perl, Python, or Shell for automation and innovation.

Preferred Qualifications
Master's degree in Electrical Engineering or related field.
Experience with industry-standard EDA tools from Synopsys (TestMAX) or Siemens (Tessent).
Experience in chip bring-up and mass production activities.
Background in advanced process technologies (7nm and below).
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink) and their specific test requirements.
Excellent communication skills with ability to work effectively in global team environments.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8831880
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