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We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is complex and schedule-challenging across architecture, RTL, verification, and system design and we are looking for a Senior Verification Engineer who wants to work hard, move fast, and help build something truly new.

The Senior Verification Engineer will join a high-end team responsible for verifying a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day:
Define, architect, and develop advanced verification environments and flows using SystemVerilog UVM.
Build block-level, subsystem-level, and full-chip verification environments with reusable methodology.
Develop coverage-driven verification strategies and automation infrastructure.
Work closely with design, architecture, algorithms, and software teams to define functionality and corner cases.
Drive testplan creation, functional coverage definition, and closure across multiple complex blocks.
Debug intricate logic interactions, multi-clock structures, and high-speed data paths.
Contribute to verification methodology, tooling, infrastructure, and continuous improvement.
Participate in a fast-moving, startup-style environment where deep technical ownership and rapid iteration are essential.

We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is challenging across architecture, RTL, verification, and schedule and we are looking for a Senior Design Engineer who wants to push boundaries, work hard, and help build something that has never been done before.

The Senior Design Engineer will join a team responsible for the architecture, design, and verification of a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day
Own the design, micro-architecture, and implementation of digital logic for a high-performance ASIC
Translate system-level requirements into detailed micro-architecture and RTL designs
Develop high-quality RTL code in Verilog/SystemVerilog
Work closely with the algorithm, verification, analog, and software teams to define interfaces and ensure end-to-end functionality
Participate in design reviews, propose improvements, and ensure compliance with coding and design guidelines
Integrate and debug digital modules in simulation and lab environments
Support synthesis, timing closure, performance optimization, and power reduction activities
Collaborate with verification teams to define test plans and ensure thorough coverage
Contribute to a high-intensity startup environment where solving tough technical challenges and meeting ambitious schedules is part of the mission

Required DFT Engineer, Nitro Team
Description
AWS Utility Computing (UC) provides product innovations from foundational services such as our Simple Storage Service (S3) and our Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, our Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services.
Join a groundbreaking semiconductor team where your expertise will directly power the world's largest cloud infrastructure. At Annapurna Labs, you'll be instrumental in developing next-generation chip technologies that transform how global businesses leverage computing power, working at the intersection of innovative design and cutting-edge technological advancement.
Key job responsibilities
* Develop comprehensive Design-for-Testability (DFT) strategies for next-generation semiconductor platforms
* Collaborate across multiple engineering domains to ensure robust chip design and verification
* Generate and optimize test patterns using advanced methodological approaches
* Conduct detailed logic design and verification processes
* Support chip bring-up and contribute to the entire device lifecycle from definition to mass production
A day in the life
Your day will be dynamic and collaborative, diving deep into semiconductor design challenges. You'll engage with multiple engineering teams, crafting sophisticated test strategies, developing intricate logic designs, and contributing to the entire chip development lifecycle. Expect to transition seamlessly between technical problem-solving, collaborative design sessions, and strategic planning.

We are looking for talented engineers to help us develop a semiconductor platform based on revolutionary architecture.
Take part in the development of cutting-edge products within a disruptive system architecture. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. our Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.
We are looking for talented physical design implementation engineers to join our excellent Physical Design team, which develops our next generation of products for the cloud market.
Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence.
* Engaged in defining implementation and signoff methodologies.
A day in the life
Your day will be filled with dynamic technical challenges that push the boundaries of semiconductor design. You'll collaborate with cross-functional teams, diving deep into intricate physical design processes, and translating complex architectural concepts into tangible technological solutions. Expect to engage in cutting-edge problem-solving that requires both creative thinking and precise technical execution.

we are looking for a skilled and motivated SW Quality and Test Architect for the Platform OS Department. The Platform OS team of our company is leading a global effort of making the Linux OS as the Automotive Safety OS that will fuel the Autonomous Vehicle and the whole automotive industry. As the technical lead and architect for Quality and Test aspects of the OS teams, you will be contributing to the overall qualification effort of our company while collaborating with OS development teams and architects
What will your job look like:
Work with the system and SW architecture teams closely.
Review and analyze all functional SW requirements from OS features and write the relevant testing and quality requirements for development teams.
Define the key performance indicators and the methodology of measuring and tracking them.
High level design of test scenarios.
Review test design and implementation with development teams.
Define functional requirements from the CI/DevOps teams to satisfy the OS quality needs.
Track the integration between the CI and OS tests.
Manage quality indicators like code quality and coverage indicators.
Mentor OS teams for quality programing and proper testing.
Track and analyze bug escapes on a continuous basis to improve testing coverage and overall quality.
Daily tracking of test coverage, resource utilization and testing time.

our company's Imaging Radar group develops innovative high-performance Radar solutions for ADAS and Autonomous Driving markets. We are seeking an experienced SoC Architect to join us.
What will your job look like:
Lead End-to-end life cycle of the Radar System-on-Chip architecture definition and development.
Provide detailed specifications for chip modules and flows.
Work in close collaboration with the various teams, including system, algo, design, verification, backend, firmware, package and post-silicon.

we are looking for a deep learning engineer experienced with computer vision to join our DL algorithms Team. We are dealing with a variety of tasks such as regression, segmentation, classification and detection while editing millions of images every week for professionals, and holding tens of millions edited images by professionals used as datasets.
Responsibilities
Design, development and bring to production novel, robust and efficient deep learning algorithms in the field of computer vision.
Create proofs of concept for new products and technology.
Evaluate and benchmark different algorithms for unique, proprietary datasets.
Collaborate with team members to define future technology and features.

Join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF System-on-Chip (SoC) products. Youll collaborate with internal teams and external OSATs to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
What will your job look like:
Define and specify advanced package architectures for digital SoCs and RF ICs in automotive applications.
Perform substrate design for flip-chip BGA (FC-BGA) packages, including stack-up, routing, and ball-out optimizations.
Evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
Collaborate with OSATs to define and validate assembly materials and process flows.
Work closely with internal teams such as Backend, SIPI, Product Engineering, and Quality & Reliability to ensure seamless integration.
Monitor yield, quality, and manufacturability across package development and production stages.
Support DFM reviews and ensure compliance with automotive standards and customer requirements.

We are seeking a highly motivated and skilled System Engineer to join our team, focusing on automotive imaging radar systems. This role is pivotal in bridging the gap between our cutting-edge radar technology and our automotive customers' evolving needs. As the key technical focal point, you will lead customer engagements, manage system-level requirements, and ensure successful integration and performance of our radar solutions in real-world automotive applications.
What will your job look like?
Develop system requirements and architecture that align with customer needs
System architectures and flows for critical functions, including boot processes, power-on sequences, system health monitoring, and diagnostics
Engage with customers, analyze and understand customer requirements and maximize alignment with existing solutions.
Program planning with internal and external customers: define, map dependencies, and prioritize the scope of customer releases.

we are seeking a Senior Product Manager to lead the definition of our company Imaging Radar. our company Imaging Radar is designed to deliver supreme performance enabling Driving by Radar. This role will focus on creating exceptional products for both global automotive partners and our company's Autonomous Driving Platforms enabling the revolution of Autonomous Driving.
What will your job look like?
Act as a technical product owner, for defining, productizing and driving our company's Imaging Radar to lead in performance and meet the cost, vehicle integration and quality goals.
Collaborate with internal stakeholders (R&D , Product and Business Development) and external partners to define the product roadmap, ensuring alignment with our company's strategy and timelines.
Own the process of requirements elicitation to capture stakeholder needs and translate them into actionable product specifications.
Define and monitor data-driven performance KPIs to ensure product excellence.
Develop and maintain accurate, comprehensive documentation for internal and external use.
Support Business Development during pre-sale processes and customer onboarding.
Partner with leading car manufacturers, including conducting workshops, test drives, and product tuning to ensure adoption and satisfaction.
Champion cross-functional collaboration, managing initiatives in a matrix environment to ensure successful execution.

The EyeQ SoC Performance Modeling and Profiling team is part of the EyeQ Platform Group (EPG), working on both current and next-generation designs for ADAS (Advanced Driver-Assistance Systems) and Autonomous Vehicles (AV). Performance models and profiling tools are essential components of the EPG infrastructure they are used during the hardware architecture definition phase of the EyeQ chip and by software developers to optimize performance.
What will your job look like:
You will be part of team that develops EyeQ SoC Performance Modeling environment and emulators
You will work on SOC performance analysis and optimizations.
You will be running HW benchmarks, to measure HW performance and to calibrate the simulation environment to match the performance of the silicon board.
You will be working on HW performance analysis and tuning, and influence future company EyeQ SoC design.
You will have the opportunity to work on open-source simulation and profiling tools and adopt them to our company's needs.
You will work closely with HW architects and SW/Algorithms developers.

The team is responsible for developing technologies, calibration methodologies and the respective instrumentation for calibration and validation of our products. These solutions will be used during New Product Introduction (NPI) and transferred to mass production.

The role of a Depth Camera Systems Engineer is to design and deploy effective calibration and test strategies for our depth sensors across our product range.

Responsibilities:
X-functional collaboration to define general calibration and test methods for depth cameras applicable across our full range of products.
Optimization of the calibration and test methods to move towards the next generation of factory testing.
Introduction of new test coverages with minimal impact on current test infrastructure.
Work with a team of SW engineers to implement the calibration and test coverages during NPI.
Develop repeatable and reproducible processes that meet mass production requirements without affecting customer experience.
Simulation and analysis the calibration of novel depth sensing modules influenced by the (optical) properties of the test setup.

As a senior member of the Apple SOC Silicon Validation Team, you will demonstrate your knowledge of SOC/IP design, debug features and related tools, validation, and problem-solving to drive failures to resolution. You will be debugging failures that come from validation, software checkout, or factory screening that appear to be Silicon issues or that require Silicon expertise in order to root cause. You will work at the cross-section of hardware and software and partner with a variety of engineers in order to quickly root cause failures. You will also drive systematic improvements in debug methods, tools and features based on your insights and expertise.

In this role, your goal is to lead complex SoC Debugs. You will enhance and maintain the debug/triage methodology. You will have opportunities to work with authorities from many teams to understand SoC and system behavior: iOS kernel/driver, Silicon Validation IP test SW, Factory diagnostics, SoC architecture, SoC IP design and verification, FPGA Prototyping, Systems Integration, board designers, etc.

We are looking for a Hardware Engineer/ Senior Hardware Engineer II (Multiple Roles) - Azure Core.
Responsibilities
Own and lead the development of complicated hardware units and test environments, based on deep understanding of customer requirements, functionality, and system architecture. 
Design and implement RTL in System Verilog, and VIP, test benches, and verification infrastructure in System Verilog UVM. 
Develop and execute test/coverage plans to verify hardware designs and reach cloud-grade quality. 
Interact with software developers and system-validation platforms, as part of the verification/validation flow.  
Oversee and train junior engineers and take leadership roles on large projects. 
Occasional on-call responsibilities for resolving customer issues in production.