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Our Networking Hardware team in Israel is looking for an experienced and skilled manager to lead hardware architecture team. The team leads the architecture of AI factory networking infrastructure for our next-generation servers focusing on accelerated performance while enabling optimized end to end GPU connectivity. Our Hardware architecture team innovative end-to-end connectivity solutions for AI factory, including switches, adapters, and optic interconnect integration into the GPU servers. Our products optimize data Center performance and deliver industry-leading bandwidth and scalability. Our products are focused on providing the most optimized power - performance communication solutions for industries like AI, ML, Cloud, Media and Entertainment as well as any other industry that can benefit from our DataStream acceleration.

We are looking for a hardware architecture Director to join the hardware team! hardware team responsible for full execution of systems ,adapters and interconnect for AI cluster deployments.

What you'll be doing:

Lead and manage the hardware next-generation end-to-end definition and architecture team, including switch, interconnect, and adapter components.
Shape the technology roadmap and strategy for next-generation hardware solutions.
Drive the vision for the hardware team, identifying needs and challenges for upcoming generations.
Facilitate communication with leadership teams and customers to ensure alignment and clarity.
Define key technical aspects, including form factor selection, signal integrity (SI), power and thermal considerations, and channel optimization (mechanical, thermal, cluster layout).
Coordinate alignment between hardware systems and chip design teams to achieve a unified definition.
Collaborate with cross-functional teams, including Engineering, Operations, and strategic vendors, to enable new technologies and products.
Be a hands-on leader, capable of independently driving new technology initiatives from concept to completion.

We are looking for a passionate Senior Software Engineer to join our Chip Design CAD team. In this role, you will contribute and work on the interesting junction of electrical and software engineering, when developing SW tools and solutions used to design the next generation Smart Adapters, Switches and GPUs for the advanced data centers across the world.

What you'll be doing:

Develop innovative SW solutions.

Take part in defining methodologies affecting design and verification engineers day to day work.

Improve existing tools, which are used in-house by electrical engineers for designing the next generation SoCs and Switches.

Collaborate with designers, verification specialists and architects to accomplish your tasks.

We are a leader in high-performance computing and machine learning, seeking a HW program manager with technical skills for HW R&D. This role involves program management of our Interconnect products, contributing to next-gen data centers.

As a top supplier of InfiniBand and Ethernet solutions, We offer best-in-class adapter cards, switches, cables, and software to optimize data center performance. We serve markets like high-performance computing, enterprise, data centers, cloud computing, big data, and Web 2.0. Our Ethernet solutions benefit industries such as Media and Entertainment with Datastream and TCP/IP acceleration. We are renowned as a desirable employer, attracting talented and forward-thinking individuals. If you're creative and autonomous, we want to hear from you!

What you'll be doing:

Build, manage, and implement comprehensive long-term programs, including setting timelines, allocating resources, and setting up progress milestones.

Work with engineers from different teams to ensure consistency with company strategy, commitments, and goals.

Facilitate teamwork and cooperation among team leaders to ensure accountability on their tasks and deadlines.

Capable of foreseeing and handling risks associated with constant change through proper prioritization. Come up with innovative solutions to difficult problems, and co-develop solutions and mitigation strategies.

We are looking for a talented Signal Processing and Communications Engineer to bridge the gap between simulation and real-world performance for high-speed wireline communication links. In this role, you will analyze lab results to refine development simulators and align them closely with actual SerDes performance, ensuring future designs are driven by real measurements, not just theoretical models. You will play a critical role in optimizing current designs for faster, more reliable chip bring-up and shaping the architecture of next-generation solutions. As part of the algorithm team, you will be actively involved in debugging unique and complex phenomena observed in the lab, working alongside post-silicon engineers to directly influence product performance. Separately, this role also provides a rare opportunity to gain broad system-level understanding, offering visibility into how the SerDes integrates and interacts within the larger chip architectureinsight typically beyond the standard algorithmic scope.

You will collaborate closely with analog and digital designers, signal integrity experts, and other cross-functional teams to ensure simulation models and lab results accurately represent real-world system behavior. If you are passionate about solving complex signal processing challenges and working at the forefront of technology, we want to hear from you.

What you will be doing:

Develop HW tools and flows to improve lab debuggability and visibility.

Correlate simulation results with lab measurements to improve model accuracy.

Work closely with cross-disciplinary teams to ensure accurate and reliable model representation.

Find performance bottlenecks

Characterize and evaluate analog and digital blocks in the lab to contribute to the DSP architecture and modeling strategies for next-generation SerDes designs.

We are seeking a highly skilled and expert Verification Lead to join our PCIe Firmware team. In this role, you will be responsible for supervising the verification plans, monitoring their execution within the teams, guiding engineers through the verification implementation, and tracking coverage, Coverity, and other relevant statistics. You will be joining a team dedicated to developing groundbreaking technology and building the core technology of next-generation devices across various fields, including low-level C layer between hardware and firmware, C++ verification environment, automation challenges, and Python testing environment.

What youll be doing:

Develop and lead verification plans, ensuring they are driven effectively within the teams.

Provide guidance to engineers on verification implementation within the verification environment.

Monitor coverage, Coverity, and other statistics to ensure comprehensive verification and optimization of next-generation NVIDIA products.

Work closely with firmware design, chip design, software, and architecture teams to define and craft both legacy and new low-level firmware flows.

Enhance methodologies and automated processes to improve efficiency and effectiveness.

We are looking for a Chip-Design Verification Engineer to join our Switch Silicon team. As a Chip Design Verification Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a design and verification team that develops the front-end design for the Switch silicon and the GPU.

Develop verification components and reference models, as well as verify and simulate chip blocks according to specifications under challenging constraints with a high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture and FW.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation Infiniband and NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the Infiniband and NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

The architect should have experience in developing models for simulations, analyzing simulation results and development of optimization algorithms.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are looking for a ASIC SOC Design Engineer.
Responsibilities:
Be a significant part of the SoC Silicon team, developing next generation IOT and AI chips.
Take part in all aspects of digital design from architecture and specification, RTL design and verification.
Close collaboration with the Physical Design team, and supporting SW and Production teams.
Contribute to the development of a very complex state-of-the-art technological project.
Integration of sophisticated sub-systems.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation Infiniband and NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the Infiniband and NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

The architect should have experience in developing models for simulations, analyzing simulation results and development of optimization algorithms.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are looking for a Computer Vision Researcher.
Responsibilities:
Conduct advanced and creative research in computer vision and machine learning to address challenges in different application areas
Collaborate on exploring research directions that align with product vision and have the potential to enhance its development and integration 
Publish research work in top-tier conferences such as CVPR, ICCV, ECCV, NeurIPS, ICLR, ICML
Collaborate with other research scientists to brainstorm ideas
Attend relevant conferences and workshops to present research findings and stay up-to-date with the latest trends in the field .

We are looking for a Experienced SW Embedded engineer.
Responsibilities:
Engage with customers, architecture, and product teams to define the right features and solutions to our product portfolio.
Design and implement features optimized for our flagship IoT products, specializing in low-memory and low-power consumption.
Drive end-to-end development of features, ensuring performance, power consumption, reliability, and maintainability.
Collaborate closely with cross-functional teams, including Software, System Validation, Architecture, and Product, to deliver high-quality solutions.

We are seeking a Senior Deep Learning Researcher for an excellent opportunity! This role provides an outstanding opportunity to engage in groundbreaking innovation and contribute to advancing diffusion-based technologies. You will work with pioneering methodologies and tools, crafting solutions that push the boundaries of AI capabilities.

What you'll be doing:

Invent and build ground-breaking techniques for efficient multi-modality model creation and publish the findings in leading journals and conferences.

Combine traditional diffusion technologies with the latest and greatest LLMs.

Contribute to our AI enterprise software to ensure robust and scalable solutions.

Collaborate with internal and external teams worldwide to drive research and development in multi-modal learning, using different professions and resources across the company.

Partner with leading scientific organizations and industry pioneers to remain at the forefront of technological advancements and integrate the latest innovations into practical applications.

Our Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of our Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on performance, power and quality. Modern Clocking design needs to balance high frequency clocks with power, DFx, noise, circuit and physical design constraints.

What you will be doing:
Working on next generation of Networking Switch, NIC and SoC products.
Micro architect and design next generation clock topologies and modules.
ASIC Clock scheme definition.
Improve Power, Performance, and Area (PPA) of state-of-the-art chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL.
Collaborate with Physical design and timing team to evaluate Clocking concerns and come up with solutions for supporting high speed Clocking.
Understand physical aspects of the chip and develop enhanced clock distribution techniques.
Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.
Support Post-Si debug, characterization and productization activities.

We are looking for a RF System Engineer.
Responsibilities:
Working on top of the edge 4G/5G IoT cellular product design.
Working on top of the edge 4G/5G IoT cellular product design.
Be a significant part of a highly experienced engineers team.
System definitions and integration of new chipsets, including ongoing development and maintenance of comprehensive RF system simulation tools.
Problem solving at system level including complicated RF/PHY/ALGO scenarios.