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we are now looking for a chip design engineer to join our switch silicon team for verification / design roles. as a chip design engineer at our networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a combined design and verification team which develops some of the switch silicon core units.
micro-architecture for rtl and simulation environment planning for units and modules.
design/verify rtl units/blocks according to arch. specifications under challenging constraints with high orientation to power, area, and performance.
build reference models, verify, and simulate chip blocks/entities according to specifications.
rtl synthesis, timing, supporting verification, and silicon post to activities.
work closely with multiple teams within organizations such as architecture, full chip micro-architecture, be, and fw.

were currently seeking a senior Developer technology engineer, artificial intelligence. would you enjoy researching parallel algorithms to accelerate ai workloads on advanced computer architectures? do you find it rewarding to identify and eliminate system bottlenecks to achieve the best possible performance on pioneering computer hardware? could you be thrilled about an opportunity to partner with the Developer community, working at the forefront of technology breakthroughs that contribute to the success of an industry leader like nvidia? if so, the Developer technology team invites you to consider this role. 
what you will be doing:
in this position, you will research and develop techniques to gpu accelerate workloads in deep learning, Machine Learning or other ai domains.
work directly with other technical experts in their fields (industry and academia) to perform in-depth analysis and optimization of complex ai and hpc algorithms to ensure optimal ai solutions on modern cpu and gpu architectures.
publish and/or present discovered optimization techniques in Developer blogs or relevant conferences to engage and educate the Developer community.
influence the design of next-generation hardware architectures, software, and programming models in collaboration with research, hardware, system software, libraries, and tools teams at nvidia.

looking for firmware engineer to join a team that works on nvidia ethernet switch. you will take part as a fw micro architect in full-cycle firmware development for new and existing products using modern software development tools and approaches.
if you're creative, responsible, hardworking, and autonomous, we want to hear from you!
what you'll be doing:
closely work with sw & hw architecture and different software develop teams to define the fw architecture for new features/improvements.
identify & diagnose high-value data path performance issues.
aim for high quality thinking and creative ways to improve fw performance, scalability and working methodologies.
you will learn how a big software project is operated, maintained, qualified and released, and how hardware and firmware are developed.
collaborate with other nvidia r&d teams around the globe.

seeking a visionary ai Verification engineer to join our chip design methodologies team. were expanding how we use ai across all our verification methods. in this role, youll help us figure out where ai fits best and build the 'brains' behind our tools. youll help us leverage ai, utilizing llms and Machine Learning -to help us debug complex chips faster and more efficiently
what youll be doing
ai ecosystem development: build and deploy an ai verification environment, moving from manual testbenches to automated stimulus generation and coverage closure.
next-gen tooling: develop and integrate ai agents and ml models directly within the verification toolchain to automate intent-to-testbench workflows.
intelligent debugging: create and refine ai-based debug assistants that can analyze simulation failures, categorize bugs, and suggest fixes autonomously.
methodology innovation: research and apply groundbreaking ai approaches (such as reinforcement learning or llms) to address the "state-space explosion" in chip verification.
collaborative intelligence: work with design automation teams and eda vendors to ensure our ai solutions provide end-to-end efficiency from rtl to gds.
leadership & training: act as the authority, training the broader team on how to bring to bear ai tools and "human-in-the-loop" methodologies.
nvidia houses the most forward-thinking minds in the world. are you a creative engineer ready to build the first truly self-verifying chip environment? come join our team and help us define the future of hardware powered by artificial intelligence.

we are now looking for a versatile, fast learner, and highly motivated fe integration and eda tools engineer! as a member of our switch organization, you will be part of frontend integration and eda flows for a highperformance, lowpower switch chip. our fei team drives methodologies, automation, and quality for our frontend implementation and cd/ci, working closely with architecture, design, verification, and backend teams. this position offers you the opportunity to have real impact in a dynamic, technologyfocused company influencing future switch product lines. 
what you'll be doing:
driving frontend integration of major blocks in a pioneering ethernet switch asic, from rtl handoff through synthesis and signoff checks.
building, maintaining, and improving eda flows and methodologies for the switch org (lint, cdc/rdc, formal, synthesis/uls, fedct/fefc and related frontend signoff flows).
working closely with logic design and microarchitecture teams to define integration constraints, clocks/resets, interfaces, and quality targets.
partnering with dv, be, and cad/flow teams to ensure robust, scalable, and efficient frontend implementation across the project.
developing automation and infrastructure (scripts, regression flows, dashboards) to improve productivity, and debuggability.
debugging complex tool, flow, and design issues; driving rootcause analysis and longterm methodology improvements.

we are looking for a formal Verification engineer for our nvidia networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking switch and gpu technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies that are in the heart of th ai revolution. our team delivers world class chips solutions for hpc, ai infrastructures, data -center, network, and Storage markets. we micro-architect, verify, and deliver smart and high bandwidth multi port switches. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of nvidia's core technology.
you will take part in the ai revolution led by nvidia, working on cutting edge architecture.

we are now looking for a senior chip design rtl design engineer for the switch silicon group.
as a chip design engineer at nvidia's networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a combined design and verification team which develops some of the switch silicon core units.
plan and design rtl units / blocks according to arch & micro arch specifications under challenging constraints with high orientation to power, area, and performance.
build reference models, verify and simulate chip blocks/entities according to specifications.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.

our company is searching for a strong technical leader to own the backbone of our networking research capabilities. we are looking for an engineering manager to lead the development of our high-fidelity network simulation platform and the extensive on-premise infrastructure that powers it.
in this role, you will lead a team of performance simulation software engineers and DevOps /infrastructure specialists. you will own the "simulation-as-a-service" product-a critical platform used by internal researchers to model next-generation data center architectures. your mission is to ensure our simulations are accurate, performant, and accessible, while managing the large-scale compute clusters required to run them.
what you'll be doing:
team leadership: manage and mentor a team of C ++ software engineers and DevOps infrastructure engineers, fostering a culture of performance, reliability, and code quality.
product ownership (sim-as-a-service): treat the internal simulation platform as a product. work with research partners to define the roadmap, prioritize features, and ensure high availability for users.
high-performance simulation: be responsible for the architecture and optimization of complex network simulation engines ( C ++ based), ensuring they can scale to model extensive data center topologies with high fidelity.
infrastructure management: own the lifecycle of our on-premise compute clusters and servers. drive decisions on hardware upgrades, prioritisation, and managing system resources.
DevOps & automation: lead the strategy for ci/cd pipelines, automated testing, and containerized deployments to ensure rapid iteration and stability of the simulation platform.
multi-functional collaboration: partner with the ai agents team to expose simulation apis, enabling agents to run experiments and gather data autonomously.

looking for outstanding chip design Verification engineers to join our networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
what you will be doing:
work in a combined design and verification team which develops core units within the networking silicon.
build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
work closely with multiple teams within organizations such as architecture, micro- architecture, full-chip, fw and post-silicon validation.
your daily work will involve all aspects of design verification: planning, coding, coverage and integration

our company is the central engine of the global ai revolution, providing the essential high-performance computing infrastructure that powers nearly every major ai and generative ai model today.
we are rapidly growing into various verticals as stated above and looking to grow our team with a Developer relations leader. this role is a key member of the company team that would manage our technical engagements in leading industries such as general ai/ml applications development, consumer internet, ai on Embedded systems and others; and to evangelize our portfolio of technologies and accelerate its adoption among developers. have strong technical competence and the ability to be a leader who can function effectively and independently in a matrixed environment to groom and guide developers.
what you will be doing:
your main responsibility will be developing a technical strategy to assure gpu and our platforms' adoption for the selected industries focusing on priorities. you will need to establish relationships and influence the technical leaders and technical communities, specifically developers, startups and isvs within these industries. you will evangelize and develop our leadership position in this market by accelerating the availability of gpu-accelerated ai and data science applications in the specified market by helping developers understand the value of our hardware products and sdks in addressing critical development opportunities. lead participation in targeted customer and industry Developer events and activities. chair technical activities spanning product divisions and sales geographies, particularly with solution architects, software developers and engineering resources, Developer marketing contribute towards our local ecosystem strategy and development of our value messaging for your customers. be the key advisor to how we are differentiated. you will become a company technology mentor and focal point for the software Developer community.

we are now looking for an arch simulation manager to join our nvidia networking team! as a switch-arch simulation manager in nvidias networking business unit, you will lead a team of highly skilled hardware engineers responsible for verifying the next generation of nvidias cutting-edge switch products. this is a unique opportunity to make a real impact at the heart of nvidias ai and hpc revolution, while working in a fast-paced, innovative environment. you will be part of a passionate and experienced team using modern approaches to validate the performance requirements for the next generation of nvidia networking products. your work will influence key architectural decisions and help deliver world-class silicon solutions for data centers, high-performance computing, networking, and Storage applications.
what youll be doing:
lead and grow a team of hardware Verification engineers focused on arch performance validation of complex digital designs.
collaborate closely with architecture, design, dv teams to identify verification needs and drive closure.
provide technical guidance, mentoring, and support to engineers in the team.
own the planning and execution of simulation deliverables to ensure high quality and timely tapeouts.

we are now looking for a senior verification manager for our fc switch silicon team. as a fullchip verification manager in networking business unit, you'll lead a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a fc team, responsible to integrate and verify the switch at system level
lead and grow a team of fullchip Verification engineers
responsible to drive the fullchip verification execution, including staging plan of the projects and deliveries
provide technical guidance, mentoring, and support to engineers in the team.
work closely with multiple teams within organizations such as architecture, u-arch, full chip micro-architecture, be, and fw
dynamic verification environments planning for units infrastructures and system level
work with design/verification team which develops core units within the switch silicon.

our company has been transforming computer graphics, pc gaming, and accelerated computing for more than 25 years. its a unique legacy of innovation thats fueled by great technology-and amazing people. today, were tapping into the unlimited potential of ai to define the next era of computing. an era in which our gpu acts as the brains of computers, robots, and self-driving cars that can understand the world. doing whats never been done before takes vision, innovation, and the worlds best talent. as an employee, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. come join the team and see how you can make a lasting impact on the world.
join our company, a world leader in computing technology and ai, where we are exploring new possibilities! our advanced development Network Engineer role in israel offers a special chance to contribute to large-scale network simulations for innovative ai datacenter research and development. you will be part of a dynamic team that values creativity and collaboration. if you are enthusiastic about technology and eager to build a significant difference, this is the place for you!
what you'll be doing:
developing a brand new digital twin powered by cuda technology for advanced research on data centers.
collaborating with a team of extraordinary engineers and researchers to develop and implement innovative solutions.
partnering with diverse teams to ensure smooth integration and deployment of network solutions.
continuously exploring new technologies and methodologies to improve our network capabilities.

we are looking for a versatile software engineer to join our dpu platform team. this is an opportunity to make a significant impact in a technology-driven company that powers the worlds most advanced data centers. you will use your expertise in low-level Embedded Linux software and boot flows to work with global development teams, solving the complex challenges involved in delivering high-power computing platforms.
what you'll be doing:
designing and developing low-level system software with a primary focus on bootloaders (atf, uefi), firmware, and hardware initialization
working together with hardware and design teams to drive SOC bring-up and platform enablement
solving complex challenges related to boot sequences, system optimization, and hardware resource management
supporting various internal and customer dpu projects alongside our global teams
taking part in all stages of the product lifecycle, with a focus on high software quality and stability
collaborating within a global software environment to have a broad impact across the company