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We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

The Opportunity We are starting a new ML/AI organization directly reporting to the CTO, to pioneer next-generation capabilities for our industry-leading defense systems. As a Founding ML-Engineering Lead, you will be the technical cornerstone of this initiative. This is a high-impact role designed for a practitioner who seeks total technical ownership of the machine learning lifecycle. You will be responsible for taking novel AI projects from initial concept through data collection, design, implementation, and evaluation, all the way to deployment.

The Technical Challenge Our ML initiatives span a diverse technical landscape. You will lead projects that range from field-oriented applications, where high accuracy and reliability are paramount, to research-oriented tools and agentic workflows designed to enhance our R&D capabilities and accelerate complex data analysis. Working in deep collaboration with our R&D teams, you will leverage unique, proprietary data to solve problems at the forefront of the counter-drone industry.
What You Will Do:
End-to-End Ownership: Lead the full technical execution of ML projects, ensuring every stage-from data acquisition to deployment-meets our rigorous standards.
R&D Collaboration: Partner closely with R&D departments to design data collection strategies and integrate ML-based tools and agents into their specialized workflows.
Versatile Implementation: Develop models and intelligent systems for a variety of use cases, ranging from real-time field performance to autonomous research-support tools.
Technical Authority: Act as a founding voice for ML implementation and strategy within the CTOs office.

Role responsibilities:
Final tests technician (Hands-on) in Production line.
Manage HW testing in production, Line setup, Calibration and Maintenance.
Deep HW knowledge in RF & Digital.
Functional testing of electronic circuits according to specifications.
Overall responsibility for debug & analysis in boards & System level.
Responsibility repair, analysis and documentation.
ATE stations technical support.

our companys innovative processors are designed into the advanced cellular systems of most tear-1 carriers .
We are looking for an experienced and creative Verification Engineer to join our Processor Verification Team.
In this role, you will be responsible for verifying the core units of our next-generation processors. You will work closely with the architecture and design teams to ensure functional correctness through advanced verification methodologies, taking ownership of verification environments from planning to coverage closure.

We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
our Impact
As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

About the group:
We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

We are looking for an experienced and creative AI processor VLSI Architect to architect and model the core of our next generation processors.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

we are looking for an experienced SW engineer with desire and ability to contribute and lead cutting edge network management system of most powerful super-computers in the world. our team is growing, and we are looking for hardworking and self-motivated engineers to lead building of advanced, high scale sdn management solutions. you will be part of a dynamic team, working with amazing people. this crucial role will give you a rare opportunity to craft and deliver a new class of data center nms product line.
what you'll be doing:
the team develops infrastructure for monitoring and gathering telemetry from production environments, running on the worlds largest supercomputers and datacenters.
the work environment is dynamic and challenging; we are innovating and inventing software products at the forefront of technology in terms of performance, scalability, and features.
our team works closely with other engineering teams to co-design new features and software apis

seeking to hire an expert firmware design engineer for the ethernet switch firmware core team. the next generation of switches are a crucial component of the most innovative ai and cloud computing networks in the world. as a member of the ethernet firmware team, you will craft and develop the firmware abstraction layer in the eth switch. this role will require you to participate in the design & development of firmware while working closely with hardware and architecture team to ensure timely delivery of our products to the market.
what you'll be doing:
highly involved in the entire software development process from architecture to integration testing of firmware for the spectrum asic product line.
work with hw & asic team to provide insights into developing the next gen of the groundbreaking of silicon and systems.
design and implement algorithms to improve system scale and performance.
work with higher layer software teams to debug issues reported by customers (internal and external).
design, implement and integrate new features according to the product roadmap.
have a new insight on how to improve our software? why not! bring your ideas to life by innovating during our hackathons
collaborate with other nvidia r&d teams around the globe.

we are now looking for hardware senior manager for our hardware switch group! the team leads the development of networking infrastructure for nvidia next-generation data centers focusing on accelerated performance while enabling optimized end to end gpu connectivity. as a leader to our hardware engineering team, you'll guide, encourage, and drive a team of highly knowledgeable hardware engineers, providing them with interesting and ambitious assignments and enabling them to stay creative and motivated while delivering products on schedule.
what you'll be doing:
build the best team to implement and executing high-performance systems
a key member of team technical management team developing world-class switch designs
lead pioneering switch system design from concept to mass production
collaborate and integrate with all hw project disciplines: board design, mechanics, thermal, pcb layout, production, software/firmware, rtl and more
planning the work of your team on multiple simultaneous development projects with a broader leadership team
managing direct reports, goal setting, coaching, performance appraisals, career planning and compensation recommendations
schedule projects, make realistic estimates of outcomes and work to make projects timely and successful for high volume manufacture.
this position is very hands-on and will require you to be intimately familiar with the entire design flow. from a technical standpoint, you will be hands-on and driving the engineering teams working the following parts of the project: specification definitions, electrical schematics, component selection, layout guidance, hands-on testing in a lab environment, accompanying production and qualification processes, micro-architecture, verification, characterization, design for testability, cost,reliability and more.

looking for a best-in-class engineer for an exciting role as a pre-silicone technical leader capable of leading complicated pre-si programs while fine-tuning existing and defining new methodology processes. be a key player in the networking hardware and software development path and contribute to the latest breakthroughs in high performance networking appliances. lead the pre-si technical programs from initial mrd presentations through "all hands" bring up events towards final customer samples release. pave the way to improved methodology and streamline processes. we develop sw and fw pre-silicone features, solutions and tools for next-generation asics, and orchestrate the pre-silicone process and asics bring-up events.
what youll be doing:
leading a multi-functional cross org team, responsible for ensuring critical software and firmware is ready to support the bringup of new switch asics
driving technical issue resolution to enable single day silicon bring up on multiple sw/hw layer while meeting aggressive product schedules.
drive, improve and introduce in-team and cross-team processes to guarantee high quality pre-silicon execution.
interface and drive pre-silicon issues across multi-functional teams: product management, architecture, software design and verification, system hardware and software, system and ic product engineering teams and others. drive technical sessions with multi-functional teams to track & follow-up on issues, progress and escalations.
focused issue reporting, bug tracking, and communication of pre-si technical program risks & status.