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As an RF System Engineer, you will develop solutions for cutting-edge RFICs in advanced 4G/5G IoT devices. Your responsibilities will include designing and supporting all RF aspects of IoT technologies, from RFIC bring-up and system-level performance evaluation to calibration flows and RF measurement tools. You will collaborate closely with Architecture, Firmware, Software, and Hardware teams, while also providing technical support and resolving customer RF issues.

Responsibilities
Development and implementation of advanced RF calibration processes
Simulation and verification of RF calibrations
Testing and analysis of issues in the mass production of components
Writing requirements for software teams to configure the RF channel to comply with 3GPP standards
Solve problems at system level including complicated RF/PHY/ALGO scenarios

As an RF System Engineer, you will develop solutions for state-of-the-art RFICs in advanced 4G/5G IoT devices. Your responsibilities include designing and supporting all RF aspects of IoT technologies, from RFIC bring-up and system-level performance evaluation to calibration flows and RF measurement tools. You will also collaborate with Architecture, Firmware, Software, and Hardware teams, in addition to providing technical support and addressing customer RF issues.

Responsibilities
Define and implement the RFIC and Peripherals APIs
Development and implementation of advanced RF calibration processes
Simulation and verification of RF calibrations
Testing and analysis issues which raise during development stage
Support customer issues which related to RF

On a typical day, you might start by running measurements on a new RFIC, analyze the data, work with designers to interpret results, update automated test scripts, and participate in team discussions to optimize circuit performance.

Responsibilities
Perform RFIC block-level analysis and characterization
Develop automation tools for RF testing and measurements
Analyze measurement data and prepare reports
Collaborate closely with RFIC designers to optimize designs
Conduct hands-on lab work with spectrum analyzers, oscilloscopes, and signal generators
Maintain and improve testing processes and documentation
Support troubleshooting and problem-solving for RFIC projects

As a Test and Product Engineer, your day often begins with analyzing production test results and identifying key issues. You might work on refining test programs, developing new hardware for test stations, or troubleshooting anomalies alongside design and manufacturing teams. You will participate in cross-functional meetings, share insights with colleagues, and drive continuous improvements that directly impact product quality, yield, and customer satisfaction.

Responsibilities
Develop, validate, and maintain production test programs for semiconductor devices.
Analyze large volumes of test data, identify trends, and provide actionable insights to design and product teams.
Define and design test hardware for wafer probing and final test stages.
Collaborate with cross-functional teams to debug and resolve product and test issues.
Support new product introduction from initial prototype through mass production.
Ensure test methodologies meet quality, cost, and yield targets.
Document processes, test flows, and improvements to support knowledge sharing and standardization.

If youre looking to make an impact, come and join a team developing the next generation of space technology.
Our mission is to revolutionize the way satellites and spacecrafts communicate through deep space, in earth orbit and with ground stations. In addition, we enable advanced and new usages of SAR and RF sensors as well as on board processing of those signals.
Our technology is based on space proven state-of-the-art proprietary ManyCore architecture that enables a completely different approach to the way space communication is done.
We are looking for experienced RF engineer to lead and innovate.
What you will be doing​
Design state-of-the-art space RF frontends.
Own the RF systems design, including specifications, component selection, design implementation and verification.
Lead technical reviews with key stakeholders to analyze system and RF design approaches
Work with cross functional teams to define HW-SW interfaces and manage dependencies
Work closely with System HW and validation engineers to define analog-digital specifications, interfaces calibration, verification, and production processes
Work closely with antenna vendors to define antenna-RF specifications, interfaces, and verification process
Escort the integration and validation process and lead its RF activities
Work closely with spacecraft integrators to prove the design and its interfaces.

We are looking for a motivated Manufacturing Technology Engineer to join our team and take part in developing and launching advanced space-grade electronic systems. In this role, you will act as the bridge between design and manufacturing-ensuring that new products are optimized for production, testing, and long-term reliability. You will collaborate closely with R&D and Operations teams to support new product introductions, from early design through prototype and mass production phases.
The ideal candidate is a hands-on problem solver with strong system-level thinking and a passion for delivering high-quality, dependable products for challenging environments. Come explore space with us!
What you will be doing
Provide DFM (Design for Manufacture), DFT (Design for Test) and DFR (Design for Reliability) inputs on Electronic and Electro-Mechanical designs.
Prepare plans for NPI projects in the company and ensure smooth and optimized product introduction into manufacturing of prototype builds.
Obtain and coordinate manufacturing documentation/deliverables for NPI
Support operation department in mass production processes, including onsite technical support abroad.
Participate in parts stress analysis and parts selection reviews, ensuring radiation tolerance, temperature rating, and environmental robustness.
Contribute to reliability predictions analyses for electronic assemblies.

We are building our Mechanical Thermal team and invite you to explore Space with us! We are looking for a Mechanical Engineer to drive our Analysis and mechanical tasks .
What you will be doing
Drive all the Thermal and mechanical design aspects of Spaceborne Computers and Payloads.
Drive multiple early design concepts while working in fast-paced product development cycles.
Independently lead product design from concept, through detailed design, and support it during Qualification, NPI and Manufacturing stages.
Join and lead task forces to investigate and support production excursions, failure analysis and reliability issues.
Collaborate in research of ground-breaking technologies, materials, and processes with other groups to bring in creative ideas that solve ever growing needs.
Extensive labs bring-up and proof of design efficiently implemented in accordance with system requirements.
Collaborate with multiple R&D and Production groups: HW, System, NPI and system validation.

The ATE Engineer is responsible for working with engineering teams to develop the ATE testing stations. We are seeking a highly experienced ATE Hardware and SW Engineer with a strong background in RF, digital, and system-level testing. This role requires deep hands-on knowledge and the ability to design, develop, and support advanced test equipment for complex electronic systems used in production environments.
What will you do:
Design and develop Automated Test Equipment (ATE) for RF, digital, and mixed-signal products at board and system levels.
Collaborate with R&D and manufacturing teams to define and implement test strategies and solutions.
Analyze and understand system schematics, block diagrams, and interface requirements to create robust and reliable ATE.
Support production lines by troubleshooting test failures and optimizing test processes for yield and throughput improvements
Interface with software and firmware teams to integrate hardware with control and automation systems.
Evaluate and select test instruments, fixtures, and measurement techniques based on product specifications.
Maintain documentation for test systems, including design files, calibration procedures, and troubleshooting guides.
Train technicians and engineers in ATE operations and maintenance.

What will you be doing?
Responsible for advanced technology insight, product planning, system architecture design, chip definition, and product definition. Support in technology roadmap development for next generation computing network related chips definition and architecture design, including Ethernet/RDMA/RoCE switching ASIC, data processing unit and etc.
Lead and execute the research and development of high-performance computing network analyzing and optimizing, including architecture-specific or network-aware architectures to accelerate the computing traffic in high performance computing system.
Propose innovative solutions for next generation architecture of high-performance computing networked system and chiplet interconnecting technology.
Lead the design and subsequent verification and validation of concepts in the team
Work with external R&D Institutes and Universities in developing novel architectures and algorithms for networked system.
Generate novel ideas and protect them with IPR fillings
Mentor and coach less experienced staff members.

We are currently looking for a Performance Simulation Expert develop and evaluate next generation performance features as well as develop the future generation of our Compute system simulation infrastructure, models and analysis tools.

Our team at the Huawei Computing Network Innovation Lab is looking for exceptional talent to join us and lead the development of next generation data centers. We create cutting-edge technologies that synergize software and hardware in tandem to accelerate compute, storage and networking at large-scale. We aim to drive innovations and deliver software defined infrastructure and algorithms to HPC, AI/ML, and Big Data applications.
We are looking for outstanding candidates with hands-on experience in development and optimization of AI frameworks. If you are a team player with excellent communication skills and motivation to revolutionize application performance, youre welcome on board!
What will you be doing?
Work as part of an innovative research team to analyze, develop, test and deploy improvements that enhance Huaweis distributed AI framework.
Develop optimizations that leverage hardware accelerator capabilities, minimize communication overhead and improve training/inference throughput
Push the boundaries of the state of the art in LLM performance and efficiency, including model compression and quantization
Analyze, profile and optimize the latest LLM AI algorithms, and implement as production-quality software libraries for latency-critical use-cases on next-generation hardware.
Work in a distributed computing environment to optimize for both scale-up (multi-device) and scale-out (multi-node) systems
Utilize advanced concepts such as Uncertainty Quantification, Mixed Precision Computing and Model Sparsity to improve performance and enable training of very large AI models
Collaborate with partners from top universities, and open-source communities to conduct state-of-the-art research.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

Looking for a CPU Architect for codesign of HW/SW feature for our CPUs for cellphones and servers. The role includes but is not limited to:
Analysis of technical challenges and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.
Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

About the group:
Highly experienced Group in switch processing including HW and SW architecture with deep background in the high-speed networking world. Our innovative packet processors are designed into the most advanced data centers by tier-1 vendors.
What will you be doing?
Definition of our next generation Packet Processor/Datapath/congestion management architecture for high-performance complex SoC Ethernet Switch.
Define the architecture from requirements to production.
Architecture & micro-architecture definition for the systems and its blocks.
Support the development group by delivering specs.