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We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
our Impact
As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

About the group:
We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

We are looking for an experienced and creative AI processor VLSI Architect to architect and model the core of our next generation processors.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

TEST verification and validation (both hw and sw).
maintain products quality by improving TEST stability, coverage, design, and manufacturing process.
execute tests in different scopes such: regression, performance degradation, functional, and security; report the progress of testing and provide summary reports of the activity.
troubleshooting and streamlining/optimizing our testing procedures.
support production matters.

we are looking for a creative and independent senior TEST engineer. nvidia networking unit has continuously reinvented itself over two decades. our high-speed buses & network products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. today, nvidia is increasingly known as the place for getting end-to-end high-speed ethernet and infiniband solutions we're looking to grow our company and build our teams with people who can join us at the forefront of technological advancement. we need a creative individual who will help transfer network silicon ics products (switch, nic, smartnic) from design engineering to mass production.
you will be exposed to various aspects of design, dft and TEST of nvidia network ic products, and will be responsible for definition and development of tests from wafer level to final TEST of network-ics. in addition, your responsibilities will include working with overseas manufacturing teams to increase yields, TEST coverage and capacity, and reduce production costs. if you are passionate about enabling of the highest quality network products that will change the world, we want to hear from you!
what you'll be doing:
ic TEST definition & development
write, execute and debug fw code
manage failure analysis of field and production failures
provide dft recommendations to the design teams
build expertise on production of network products

gain our customers trust and understand their needs.
support new supercomputers and ai fabrics technologies.
solve complex issues while leading highly visible customer issues.
work closely with various r&d teams and develop features for our customers.
provide constructive feedback to engineering and marketing regarding products requirements.

responsibility to coordinate between all project collaborators such as chip design team, q&r team, arch, icpe, from initial fuse definition stage till product end of life, including release to mass production
responsibility for all fuse ccb activities
collaborate closely with domain owners and stakeholders across various teams to gather and validate inputs required for product configuration, ensuring alignment with overall project and product strategies.
manage and coordinate configuration files and parameters for multiple products, maintaining accuracy and consistency throughout the product lifecycle.
contribute hands-on to product execution activities by actively working on configuration management, including updates, troubleshooting, and validation of configuration settings
support the integration of product configurations into the overall product development and manufacturing processes, ensuring smooth deployment and operational readiness across multiple product lines

we are looking for a talented experienced firmware engineer to join our network adapter firmware team. the firmware team develops cutting edge networking features for cloud, hpc and Storage. we drive the data growth of the worlds biggest companies. with talented engineers around the globe, the work environment is dynamic, meaningful and fast paced.
 
what you will be doing:
work closely with the architecture and different software design teams.
implement new features in the core of nvidia nic firmware.
implement verifiers for advanced features in our advanced random firmware testing environment.
gain a deep understanding of system debug, networking technology and stacks, as well as the hw/fw/sw relationship.
you will learn how a big software project is operated, maintained, qualified and released, and how hardware and firmware are developed.

our networking product engineering team is looking for a TEST development engineer. the position combines an understanding of hw and sw to provide stable, efficient, smoothly running production tests, to enable high availability, while ensuring the quality of the products being shipped to customers.
what youll be doing:
design and develop automated tests for networking switches while working closely with the hw, asic, and sw engineering teams to achieve a reliable TEST with high coverage
exposed to various aspects of design, dft, and TEST of nvidia's next-generation network products
take a significant part in the definition and development of tests from the development level to the final TEST of network-systems
working with overseas manufacturing teams to increase yields, TEST coverage, and capacity, and reduce production costs

looking for a highly motivated Hardware Engineer to lead change impact analysis activities related to engineering design changes (ecos/ecrs) across our cutting-edge networking and computing platforms. this role is critical to ensuring that all product modifications are seamlessly evaluated for their impact on hardware, mechanical design, system performance, and TEST coverage across the product lifecycle. you will work closely with r&d, mechanical engineering, manufacturing, quality, and TEST teams to assess risks, define mitigations, and maintain excellence in product integrity and testability.
what youll be doing:
leading engineering change analysis (eco/ecr) processes across complex hardware systems.
evaluating the impact of component, layout, and mechanical changes on hardware functionality, manufacturability, and testability.
collaborating with cross-functional teams to ensure smooth implementation of changes without compromising product quality.
supporting dft (design for testability) requirements in the face of ongoing design changes.
reviewing bom and layout revisions and assessing ripple effects on power delivery, signal integrity, and thermal performance.
maintaining change traceability and documentation to meet engineering and compliance standards.
coordinating with manufacturing and operations teams to ensure product readiness and alignment with production timelines.