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our company networking system validation group is growing, and we are hiring a junior switch system Validation engineer. as a member of the team, you will take part in our core network projects which drive the growth of the company, tech and business wise. you'll gain networking and switch u-arch knowledge while helping validate, optimize, and debug devices in different areas like quality-of-service, performance, logic correctness, and ai features. 
you will work closely with logic design, circuit design, and architects to ensure successful product development with aggressive product cycles, in both pre and post silicon stages. 
you should have a good grasp of software development in different fields, such as Python scripting, Embedded software, and device firmware. it's important to have experience in a complex emulation environment and show a strong interest in creating, doing, and improving silicon validation plans. 

what you will be doing: 
work in a combined design and verification team specializing in switch full chip works
understand the switch architecture and build on  TEST plan accordingly 
develop full chip  TEST collaterals/suites, maintain regressions, debug failures and sign-off coverages 
maintain TEST suites to facility emulation and/or silicon platforms checkout as well

seeking an experienced software engineer to join the networking switch sw group, developing the switch operating system (nvos). key role in developing the nvos is critical for next-gen networking tech for hpc data centers. are you passionate about working on innovative technologies? then we want to hear from you!
what you'll be doing:
owning and leading the nvos including development, testing flow and product life cycle.
as a senior software engineer at nvidia, you will use your expertise in C ++ and Python to develop nvos features and support new products.
lead nvos integrations with fw, hardware, and production teams.
support internal and external customers for any nvos related items.

our company is looking for an asic design engineer to join the dft design team and develop the next generation dft technologies.
as a design engineer in the dft design team at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

we are now looking for a motivated chip architect to use your creativity to work on the connectx network adapter with the highly inventive and knowledgeable team.
what you'll be doing:
define the network adapter chip architecture end to end from the market requirements through design and all product life cycles (post/pre-silicon, on deployments). work with related industry standards & customers on deploying your tech.
collaborate with teams across teams (physical design, logic design, system software, firmware, applications)
work on proof of concepts and advance development projects.
perform research and analysis for current and future architectures.
craft product design specifications.
serve as a focal point within the organization and distribute the knowledge that you acquire.

we seek a highly motivated and experienced  system architect specializing in data -center, ai fabric, and ethernet networking to join our team of experts and help shape the future of high-performance ml/ai computing. you will have the opportunity to work on some of the most pioneering technologies and help drive the innovation of our next-generation networks. you will play a key role in defining end-to-end solutions, networking protocols and features, interworking with orchestration systems, and help address new business opportunities in exciting areas. our architects also represent nvidia in open-source projects, technical conferences, and standard development organizations.
what you'll be doing:
explore new technologies and end-to-end solutions for our ethernet networking platforms.
be familiar with data -center and ai fabric network topologies, ai/ml clusters operation and network usage, as well as with the ethernet switch platforms' design and characteristics.
define robust architectures and technical requirements for network operating systems and end-to-end solution offering for ai/ml workloads' needs and highly performing network operations.
lead the work with r&d and validation teams, providing technical guidelines and close support and thorough reviews for detailed designs and TEST plans.
collaboration with architects across various fields, including chip design, firmware, hardware platforms, and system teams.
close work with Product Marketing, program managers, and account managers to ensure the successful execution of projects.
support engagements with key customers, issue patents, publish white papers and blogs, and be proactive in technical forums and industry working groups.
promote innovation through the design and implementation of proof-of-concept (poc).

we are looking for an excellent virtual platform fw engineer to join the infrastructure and simulation integration group. in this role, you will integrate a systemc/tlm virtual hardware platform (delivered by the hardware modeling team) with firmware, make the end to end flow run reliably, and turn it into a productive environment for early development and regressions. with many hardworking engineers around the globe, the work environment is complex, driven by a passion for achieving goals, and fast paced. you will learn how large scale firmware projects are operated, maintained, qualified and released, and how firmware and pre-silicon platforms are developed together to accelerate product readiness.
what you will be doing:
work closely with firmware, hardware architecture, systemc modeling, and build/tools teams.
integrate firmware images with a systemc/tlm virtual platform and enable end to end boot, bringup, and feature flows.
define and implement hw-fw interfaces for the virtual platform (mmio, interrupts, dma, boot flows, configuration).
integrate the virtual platform flow into ci, regressions, and nightly qualification, including triage and failure analysis.
drive stability, scalability, and performance of virtual platform runs and regressions.
document processes, guidelines, and tooling that make the virtual platform easy to adopt across teams.

seeking a highly skilled and modern software engineer to develop and prototype brand new advancements in distributed training and inference using nvidias spectrum-x ai fabric. this role offers a rare chance to pioneer ai and networking technology, contributing to ground-breaking projects that will define the landscape of large-scale ai systems. improve ai app-networking connection by refining communication, crafting congestion control, coding nic firmware, and expanding switch sdk features for enhanced ai factory efficiency. your work impacts large ai system development, scaling, and speed.
what youll be doing:
prototype end-to-end solutions to improve distributed training and disaggregated inference performance.
analyze and optimize communication flows across application, transport, and network layers.
develop system software spanning communication libraries, drivers, and firmware integrations.
collaborate with hardware, firmware, and sdk teams to co-design network features.
validate and integrate prototypes into nvidias ai infrastructure and products.

we are seeking an excellent Software manager to join to nvos  sw group in yokneam ilit. you will have the opportunity to lead a development team responsible for the software of the next-generation networking products while being hands-on with development activities. we drive the data growth of the worlds biggest companies. with dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. are you ready for the challenge?
what you'll be doing:
lead a team of engineers and provide technical guidance to the team of highly skilled engineers. empower the team members to excel and increase team productivity.
lead the design and implementation of new features in the nvos .
drive and facilitate the planning, scheduling, and execution of the project and activities of the team
collaborate with architecture and different software design teams as part of the software development lifecycle.
support internal and external customers for any nvos related items.
gain a deep understanding of networking technology, system debugging, and stacks, as well as the sw/fw relationship.
innovate! bring our networking products to shine in the customers view

we are looking for a 100% hands-on Storage services software engineer to join the block Storage group. you will be a member of a team that builds the next generation block Storage capabilities. you will work closely with a variety of teams and architects including the networking team, and external customers. you will take part in defining the software architecture and implementation of the most advanced Storage services! services that will need to meet extreme performance and scalability demands! we have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform of tomorrow.
at our company, we work, think and learn as a team. we thrive in a deeply strong environment, and we're passionate about a culture that demands innovation and the highest standards. the rewards are sweet and include collaborating with some of the smartest people in the industry, an aggressive compensation plan that rewards top performers, and the opportunity to work on products that transform the way people work and play.
what youll be doing:
100% hands-on coding role in C language, Kernel and userspace
research, design, implement and TEST, new and existing, distributed Storage services and features of our block Storage solution, in both host and dpu environments.
acquire understanding of the algorithms, the technicalities and the interaction with other components across our block Storage ecosystem.
analyze and solve challenging bugs and customer cases in large scale production systems, identifying issues in our or inbox Kernel modules and often in other components. drive new solutions based on any issues that arise

We are looking for an experienced Global Manufacturing Program Manager to join our team. This role involves managing complex programs from planning through full implementation, including knowledge transfer, production infrastructure setup, and compliance with regulatory and logistical requirements.
* Lead complex programs for establishing manufacturing and maintenance sites abroad, from planning to full execution
* Drive knowledge transfer processes to international teams
* Establish and implement production lines, processes, and operational procedures
* Collaborate with cross-functional teams, including Engineering, Operations, Procurement, Logistics, and international stakeholders
* Manage local and international suppliers and subcontractors
* Ensure compliance with quality standards, regulatory requirements, and security protocols
* Oversee project timelines, budgets, and risk management

conduct in-depth performance characterization and analysis on large multi-gpu and multi-node clusters.
study the interaction of our libraries with all hw (gpu, cpu, networking) and sw components in the stack
evaluate proof-of-concepts, conduct trade-off analysis when multiple solutions are available
triage and root-cause performance issues reported by our customers
collect a lot of performance data ; build tools and infrastructure to visualize and analyze the information
collaborate with a very dynamic team across multiple time zones

our company is at the forefront of ai-driven innovation in vlsi design automation. join us to shape the future of semiconductor design with cutting-edge ai tools and make a significant impact in a collaborative, high-performance environment. are you ready to push the boundaries of whats possible in vlsi cad? come be part of our pioneering team!
what you'll be doing:
you will be responsible for developing and integrating advanced cad solutions and automation flows using ai and Machine Learning for vlsi design, verification, and implementation.
work closely with design, verification, and cad teams to identify areas for improving vlsi workflows using advanced tools and methods.
research, prototype, and deploy ai-based algorithms.
develop and maintain scripts and automation infrastructure to enable seamless adoption of ai tools in the vlsi design process.
continuously review emerging ai technologies and methodologies to keep our cad environment up-to-date.
provide Technical Support and training to engineering teams on ai-enabled cad flows and best practices.

we are continuously improving and evolving the solution to meet the challenging goals. if you find groundbreaking technologies, and next generation products interesting, then this is the team for you. take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!
what youll be doing:
you will be in charge of state of the art design for TEST /atpg flows and implementation
take full atpg ownership end to end on a project, from arch & planning to pattern generation, verification and post silicon bring up and diagnosis.
inventing and maintaining automation flows that provide the short TEST time to production

we're looking for a hardware architect for our nic and dpu division. in this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of nvidias next generation nic and dpu products. your role will be cross-disciplinary, working with software, asic design, verification, physical design and platform teams to improve performance and debug.
what you'll be doing:
learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and Verification engineers.
define the implementation of the most sophisticated debug features of our next products, balancing architecture requirements with backend, execution, and design considerations.
define the implementation of debug capabilities to support performance validation and improvements
understand our system debug requirements and help define the por of our nic and dpu product line.
face the most challenging full-chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
thoroughly understand SOC flows, pcie, ethernet, infiniband and nvlink protocols.

are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? our design-for- TEST engineering team at our company works on groundbreaking innovations involving crafting creative solutions for dft architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. we are looking for an experienced dft engineer to join the atpg team. the position includes taking part in development of the next generation dft technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing. 
 
working on the most advanced technologies and complex products, our dft solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. if you find groundbreaking technologies, and next generation products interesting, then this is the team for you. take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements! 
 
what youll be doing: 
you will be in charge of state of the art design for TEST /atpg flows and implementation 
take full atpg ownership end to end on a project, from arch & planning to pattern generation, verification and post silicon bring up and diagnosis. 
inventing and maintaining automation flows that provide the short TEST time to production