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Job Objective:
To sell and promote ACS Motion Control products and technology, provide basic Technical Support and demo to the companys customers and distributors in the territory.
> Manage the companys customers and distributors accounts in the territory.
> Implement sales plan and achieve personal sales goals > Collect and feedback market information and competitors information.
> Provide motion control solutions for customers.
> Responsible for trade shows in the territory, in cooperation with corporate marketing.
> Provide basic Technical Support to customers.
> Demonstrate product features to customers.
> Simple system setup and tuning at customer site.

we are looking for a senior VLSI Design Engineer highly experienced in developing designs for complex SoC devices, from arch/uarch definition to coding and verification. In this position you will have end-to-end responsibility for all design flow. In this position you will be responsible for full cluster/block uarch, design, initial synth, lint, integrating and supporting PD, DFT and verification.
If you are curious, innovative, have strong technical skills with a hands-on approach, and understand the full design, system view and SW integration requirements, this position is for you!

We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in a start-up company.
Taking full ownership of entire domain, defining the verification strategy, writing, and executing verification plan in system Verilog UVM.

The Operating System Team is looking for a highly talented Embedded SW Integration Engineer with a passion for operating systems and Linux in specific.
The team is developing the Boot and Operating System SW for our autonomous vehicle and smart advanced driver assist platforms.
What will your job look like?
Hands-on debugging and testing of OS and related components (Boot, HW initialization, Device drivers, Linux Kernel, User space libraries and tools & automated tests in python).
Deep understanding of the involved OS/Boot components and their integration with other SW/HW modules involving testing automation and system level validation.
Closely work with members of the Boot and OS development teams to integrate, test and automate new features, components and systems.
Release & feature management in a multi-project and multi-disciplinary environment while managing CI systems for testing coverage.

We are looking for a Senior PCB Design layout Engineer to join our Hardware engineering team at the Autonomous Vehicle Platform department as a key player in the development of next-generation ECU (electrical control unit) for autonomous vehicles.
What will your job look like?
Working closely with hardware and mechanical design engineers, you'll perform PCB layout our ECUs and other products.
Complete development of CAD layout from footprint definition, detailed component placement, constraints management, with a concept of topology and signal and power integrity.
Be responsible for the design releases required generation of artwork files, ODB++, FAB drawings, ICT report, and electronic PCB documentation.
Your designs will need to follow IPC class 3 , signal and power integrity constraints, EMI/RFI control and automotive regulations..

Required Senior IC Test Engineer
Haifa
Full time
We are the Production Test team - responsible for the definition, development, and deployment of production test operations for the worlds most advanced SoCs for ADAS and self-driving vehicles.
This is your opportunity to join a team during its initial forming stage and leave your mark as we assume full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
What will your job look like?
Work closely with the design teams from early stages of the design process to review DFX architecture and define test requirements.
Define test methodologies and generate test content for high-speed interfaces of embedded IP blocks (LPDDR4/5, PCIe Gen4/5, D/C/MPHY).
Test program coding, pattern conversion and pre-Si validation (virtual test simulations)
Support Load Board and Probe Card design activities.
Lead post-Si test program debug activities to enable delivery of samples to internal and external customers.
Test program characterization and tuning to enhance test program quality to meet automotive standards.
Support Quality & Reliability team to enable effective and timely qual plan execution.
Lead test deployment activities with tier-one Foundry and OSAT vendors to enable large-scale Wafer-Sort and Final-Test operations.

We are seeking a motivated Formal Verification Engineer to join our team and contribute to development of hardware verification environments.
This position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
This is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle.
What will your job look like:
Be the owner of formal verification environment from first draft to sign-off stage
Apply formal methods to verify the correctness of various complex digital systems
Work with HW architects/designers to define assumptions, rules and cover properties
Help define the formal verification methodology and environment to be applied by the team
Explore new Formal methods and Tools
Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago
Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
Develop generic formal blocks/functions of commonly used logic, to be later used off the shelf.

As an ML Software Engineer with a focus on low-level and CUDA-based optimizations, you will play a key role in shaping the design, performance, and scalability of machine learning inference systems. Youll work on deeply technical challenges at the intersection of GPU acceleration, systems architecture, and ML deployment.
Your expertise in CUDA, C/C++, and performance tuning will be crucial in enhancing runtime efficiency across heterogeneous computing environments. Youll collaborate with designers, researchers, and backend engineers to build production-grade ML pipelines that are optimized for latency, throughput, and memory use, contributing directly to the infrastructure powering next-generation AI products.This role is ideal for an engineer with strong systems-level thinking, deep familiarity with GPU internals, and a passion for pushing the boundaries of performance and efficiency in machine learning infrastructure.

Responsibilities
Design and implement highly optimized GPU-accelerated ML inference systems using CUDA and low-level parallelism techniques
Optimize memory, compute, and data flow to meet real-time or high-throughput constraints
Improve the performance, reliability, and observability of our inference backend across diverse compute targets (CPU/GPU)
Collaborate with cross-functional teams (including researchers, developers, and designers) to deliver efficient and scalable inference solutions
Contribute to ComfyUI and internal infrastructure to improve the usability and performance of model execution flows
Investigate performance bottlenecks at all levels of the stack-from Python to kernel-level execution
Navigate and enhance a large, complex, production-grade codebase
Drive innovation in low-level system design to support future ML workloads

We are looking for a skilled and motivated experienced RT Systems Integration & Release Manager to lead an systems integration team and own the end-to-end integration and release process for real-time embedded products.
This role is responsible for defining integration workflows, managing team execution, and ensuring that system releases are stable, predictable, and aligned with quality and delivery commitments.
The ideal candidate combines deep embedded systems expertise, strong people leadership, and disciplined release and process management.
What will your job look like:
Directly manage and mentor a team of RT systems integration and release engineers.
Define, implement, and continuously improve the RT system integration and release management processes.
Establish standard workflows, best practices, documentation, and quality gates.
Ensure consistent execution of integration activities across projects.
Drive alignment to integration processes across firmware, software, hardware, QA, and system validation teams.
Identify integration risks early and implement mitigation strategies.
Lead system-level integration of real-time hardware and software.
Manage system debugging, and root-cause analysis of complex integration issues.
Oversee validation, verification, and system-level testing activities.
Communicate progress, risks, and mitigation strategies to stakeholders and leadership.

Required Experienced SoC Verification Engineer
Haifa
Full time
Our SOC verification group owns the important and challenging job of verifying our chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

We are looking for an Emulation Engineer to join our Radar VLSI team and drive the development of next-generation ASIC Sensors.
We are developing best-in-class automotive radar solutions to complement our autonomous driving platform. Joining our expert team, you will leverage our unique assets to work on cutting-edge technology in a dynamic and challenging environment.
What will your job look like?
In this role, you will build high-end Emulation environments based on new designs. The position involves building and integrating complex components, working with cross-functional engineering teams, and developing systems that will change the way we drive.
We are looking for an engineer who thrives on challenges and is committed to engineering excellence while navigating complex constraints.
Lead Emulation development for the VLSI team.
Work closely with SW, Logic, and Verification engineers.
Serve as an expert matter for your domain, with full responsibility for driving and implementing improvements and new ideas.

Required Experienced C++ Compiler Engineer for Deep Learning
We are the world leader in automotive and driving assistance systems, developing the world's most advanced software technologies and hardware architectures.
Our group is located in Haifa and is responsible for enabling the deep learning and computer vision algorithms on the platform. The technology we develop enables state-of-the-art deep neural networks to run efficiently in vehicles - contributing to saving lives and enabling autonomous vehicles.
This is an exciting opportunity to work with highly talented engineers and be a part of a product with a lot of innovation and work on cutting-edge compiler and optimization technologies in the AI domain.
What will your job look like?
Shape our product by applying cutting-edge deep learning network optimization techniques and will have the chance to influence future generations of our hardware and software
Develop a deep learning compiler stack that takes neural network descriptions created in frameworks such as TensorFlow and PyTorch and converts them into code suitable for execution on custom-built hardware
Use state-of-the-art open-source technologies such as MLIR and work closely with the open-source community
Develop optimized implementations of a variety of neural-network operations and new optimization techniques and algorithms to efficiently map ML models onto our state-of-the-art systems
Develop a toolchain that will provide a quantum leap in Deep learning capabilities and performance.