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Requirements:
BSc / MSc/ PhD in Electrical engineering from a leading institute.
5+ years pf experience in Physical Design (back-end) digital implementation: floor planning, place and route, clockTree, STA
Experience in the Synthesis, Formal verification and DFT is an advantage.
Experience in microelectronics/ EDA industry.
High level of English.
Strong presentation and communication skills.

Requirements:
At least 10 years of hands-on experience in system architecture design, or equivalent research experience
Demonstrated experience in leading R&D team
Familiarity with high-performance computing cluster services and system architectures, such as AI, HPC and big data.
In-depth understanding of computer networks, communication libraries, and design of AI or HPC cluster networks
Key qualifications you hold include:
Ability to work in a team environment; actively seek out resolution to issues with the team and work co-operatively to build a coherent system; Team-working and excellent inter-personal communication skills.
High level of self-reliance and an autonomous target-oriented work style, can do attitude, eager to learn new things and ready to think outside the box
Ability to work on a schedule, even for un-schedule-able issues such as inventiveness
Experience with network system of AI, HPC or big data cluster
Demonstrated capability in several items from the list below:
o Deep understanding of computer network protocol and network topology of computing cluster
o Familiarity with communication library, such as OpenMPI/NCCL
o Extensive experience in leading the network architecture design of computing cluster
o Experience with implementing routing algorithm
o Familiarity with network specifications of CPU/Network Processing Unit/ Neural Processing Unit/Switch chip
Fluent in written and spoken English

Requirements:
B.Sc. or higher in Electrical Engineering, Computer Science, or related discipline
10+ years of experience in VLSI/processor architecture (exceptional candidates with less experience will be considered)
Strong hands-on experience with SystemC modeling
Solid background in AI workloads and AI hardware architecture
Experience in HW/SW co-design and architectural trade-off analysis
Ability to operate at high levels of abstraction and drive architectural decisions from simulation data