לוח משרות דרושים מדעים מדוייקים במרכז

About us:
An Israeli research and development company that analyzes cyber and technological security threats and designs secure architectures and controls for complex systems. We provide our customers with cyber-resilient architecture design, research and development of innovative security controls, hardware security, and system security engineering, as well as expertise in protecting RF and Wireless channels, cryptography, quantum communication and more.
Job Description:
As a system Engineer in multidisciplinary projects focused on RF and communication systems you will lead the engineering aspects of the system, conduct system design surveys and participate in various design and testing stages of the system. You will also take part in cyber research and analysis, threat research, characterize protection and cyber products, and develop innovative cyber- RF solutions.
Option for full-time or part-time employment.

Join our education-services team as a dynamic technical trainer and content developer. We're seeking an exceptional individual with expertise in networks, server administration, containerized environments, storage and orchestration tools to lead the delivery and development of technical content related to our AI infrastructure and software solutions. As a key member of our team, you'll collaborate with internal and external experts to design and deliver lab-based training that empowers customers and partners to manage and optimize accelerated computing solutions across diverse workloads, including deep learning, data science, and high-performance computing.

What youll be doing:

Training Delivery: Conduct engaging face-to-face and remote training sessions for our customers and partners, with flexibility for up to 25% travel.

Content Development: Craft cutting-edge training materials aligned with our innovative AI and data center technologies.

Collaboration: Work closely with domain experts to develop course proposals that meet market demands and customer needs.

Lab-Based Training: Design interactive lab exercises enriched with diagrams, videos, and hands-on experiences.

Instructor Support: Develop comprehensive instructor resources, certification criteria, and assessment materials.

Imagine what you could do here. new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish.
The people who work here have reinvented entire industries with all Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking products.

In this visible role, you will be responsible for defining DV methodologies, test-bench infrastructure and project execution for the next generation MSP (Memory Signal Processing) IPs to enable state of the art storage solutions for products line.

You will develop verification test plans, test benches, tools and infrastructure, protocol monitors and agents, and coverage driven stimulus in UVM.
Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market.
Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP and subsystem, with additional emphasis on power (NLP) and performance.
You will work closely with the design, architecture, software, system and validation teams from the early stages of IP definition, to ensure timely delivery of quality designs.
Involvement with Post Silicon Validation and other verification teams.

An exciting semiconductor startup is seeking an outstanding formal verification
engineer to develop a new type of massively parallel architecture.
This is a rare and exciting opportunity to join an evolving team and company,
allowing you to influence the future of both processor architectures and
database systems.

Job Description
We are looking for highly motivated engineers who love the challenge and the opportunity
of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

An exciting semiconductor startup is seeking an outstanding verification engineers to develop a new type of massively parallel architecture.

This is a rare and exciting opportunity to join an evolving team and company, allowing you to influence the future of both processor architectures and database systems.

Job Description
​​We are looking for highly motivated Engineers who love the challenge and the opportunity of a growing company. Join us and be a part of a small and dynamic team, which is revolutionizing the parallel processor architecture.

Provide our customers technical and engineering expertise in their ASIC design HW verification process, using our HAV Platforms and Solutions:
Analyze customers verification methodologies and targets, platform and Testbench solutions planning.
Drive and execute HAV products Evaluations on customers designs.
Support customers in deployment of the HAV products, from RTL code compilation and synthesis, towards SoC-level full functionality bring-up on the systems.
Hands-on bring-up of Emulation Testbenches, including interface protocol Transactors, memory models SpeedAdapters, C++ code, and automation scripts.
Regularly interact with customers as their first contact to address any quality issue or required improvements in our products and their collaterals.
Work internally with R&Ds to provide feedbacks on products, track development process and roadmaps.
Work internally with Sales team on accounts strategy and business growth opportunities.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team in our coompany, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

We are looking for a skilled and driven Experiment Operator to join our team.
As an Experiment Operator, your role will be examining and interpreting extensive datasets in order to derive valuable insights and offer actionable solutions.
You will have the opportunity to work both independently and collaboratively in a variety of testing environments, such as laboratories and outdoor settings.
It is expected that you display proficiency in operating multiple devices efficiently.
Additionally, your contribution will be valuable in creating test plans and reports to effectively manage and organize test data.

Required ASIC Verification Engineer
Verification Group in a growing group responsible for pre-silicon ASIC Verification of complex chips implementing an advanced modem technology.
As part of the role, you will architect, develop & own blocks / sub-subsystem / system-level verification benches. You will be a major contributor to advanced SV UVM methodologies and to infrastructure development. You will be part of an advanced development flow, using state-of-the-art development & Verification tools and will work closely with the chip architects and RTL / VLSI design teams.
RESPONSIBILITIES
The Verification Engineer will be responsible for different HW blocks at module-level and sub-system level and is expected to:
Have an expert-level understanding of assigned HW blocks as well as a good understanding of the block in the context of whole system.
Communicate with architect, designer, algorithm and other verification engineers to lead complex verification tasks, both on module-level and sub-system testing.
Design complete verification environments.
Implement design in full UVM environment.
Perform full block regressions and collection of functional coverage.

Required Algo Engineer
Within the Algorithm team, you will be responsible for designing and specifying new architectures/algorithms for the physical layer of wireless products. You will work tightly with SW team, ASIC team and Integration team.
RESPONSIBILITIES
Design new algorithms/defining new architectures for the existing and future products
Implement and validate the methods in the baseband simulator of the DSP team
Produce and update design/performance documents along with the development process
Support of the Asic team for the Verilog/VHDL implementation
Support for investigations on performance issues in house and on site.