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Required Edge-AI SOC Verification Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
You will be part of a team that pushes boundaries, developing autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead the verification of an edge AI IP, to be used in edge-AI products.
Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
Plan the verification of digital design blocks, including writing test plans, and other verification documents.
Code development of verification features and capabilities, and participate in RTL debug.
Work closely with architecture, software, design, and physical design stakeholders to make technical decisions and represent project status throughout the development process.

Requied Full Chip CAD Physical Design Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining whats possible.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Demonstrate an understanding of the Register-Transfer Level (RTL) to Graphic Data Stream (GDS) II flow.
Manage the implementation of large, complex system-on-chips (SoCs), subsystems, and sub-wrappers, and demonstrate an understanding of associated issues and solutions.
Utilize floorplanning, power grid design, and place-and-route methodologies, and use Synopsys tools like Floorplan Compiler (FC) and Formality.
Exhibit an understanding of advanced node design (e.g., 5nm and below) and related optimization techniques.
Develop script in Synopsys TCL and Python.

Required Senior SoC Formal Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to build the best cloud in the world for our services and for our Cloud customers, by solving real world business issues of performance, cost, and scale, utilizing hardware, software, and system solutions. To better serve evolving cloud needs, we are establishing a team in Israel to develop custom chips for servers.
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties and apply sign-off to blocks.
Pioneer and refine formal verification methodologies by systematically embedding AI tools to optimize verification accuracy.
Architect and implement reusable formal verification components.

Required Technical Program Manager, Silicon Design Services and Strategic Extended Workforce
About the job
A problem isnt truly solved until its solved for all. Thats why we build products that help create opportunities for everyone, whether down the street or across the globe. As a Technical Program Manager, youll use your technical expertise to lead complex, multi-disciplinary projects from start to finish. Youll work with stakeholders to plan requirements, identify risks, manage project schedules, and communicate clearly with cross-functional partners across the company. You're equally comfortable explaining your team's analyses and recommendations to executives as you are discussing the technical tradeoffs in product development with engineers.
Behind all of our user-facing AI models, applications, and cloud services is an advanced data center infrastructure powered by custom silicon designed by us.
As the Lead Technical Program Manager for Silicon Design Services and Strategic Extended Workforce, you will drive the end-to-end technical engagement, program management, and operational execution of our multi-vendor design services ecosystem. You will lead cross-functional programs spanning external partner selection (RFI/RFP), technical scoping, Statement of Work (SOW) drafting, and day-to-day execution across multiple development functions such as: Physical Design, Design for Test, Verification, and Silicon Engineering (SiEng/NPI). You will serve as the critical technical bridge between our internal silicon design/architecture teams and external design partners, ensuring execution velocity, first-pass silicon quality, IP security, and commercial alignment.
Responsibilities
Lead end-to-end program lifecycles for external design services from scoping, RFP, and SOW finalization through tapeout and production ramp.
Establish multi-tiered vendor governance frameworks and drive critical technical, budgetary, and schedule tradeoff discussions between internal and external leadership.
Partner with our execution owners and vendors to align milestone deliverables, sign-off criteria, and dependency tracking for advanced node SoCs.
Deploy secure Cloud CAD development environments and manage outsourced silicon NPI, including ATE test development and OSAT manufacturing handoffs.
Define Key Performance Indicators (KPIs) and Service-Level Agreements (SLAs) to track milestone adherence, pro-actively mitigate critical-path program risks, and govern strategic commercial agreement terms.

We are looking for an Algorithms Engineer who will handle the design and implementation of the automotive imaging radar Algorithms stack.

What will you do?
Be part of the team that defines and scales up radar high performance algorithms and make them meet the ADAS and Autonomous Vehicles standards and beyond
Consistently improve radar performance
Design, develop and implement Radar data analysis methodology
Be a knowledge source for automotive radar KPIs
Work closely with different stakeholders that include external customers and internal interfaces like SW, HW, and others

We are looking for an Algorithms Manager who will lead the design and implementation of the automotive imaging radar Algorithms stack.

What will you do?
Lead the team which defines and scales up radar high performance algorithms and make them meet the ADAS and Autonomous Vehicles standards and beyond
Drive and consistently improve radar performance
Identify key areas of Next Generation improvements, recommend research directions and system solutions
Design, develop and implement Radar data analysis methodology
Be a knowledge source for automotive radar KPIs
Work closely with different stakeholders that include external customers and internal interfaces like SW, HW, and others

We are looking for a Senior DSP Software Engineer who will lead design and implementation of our innovative signal processing algorithms on the industry cutting-edge target platform, consisting of embedded cores, DSPs, and dedicated accelerators.

What will you do:
Perform analysis, design, implementation and validation of innovative MIMO imaging radar algorithms for next generation ADAS and autonomous
vehicles on our target platform
Participate in SW architecture design and perform signal processing algorithm porting & optimization
Address real-time constraints in a challenging memory/compute bound framework
Be part of a goal-oriented workgroup and dynamic research & development environment
Work in close collaboration with CTO and SW architecture team

Required Senior Silicon DFT Lead
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.

We are looking for a Senior RT Embedded Engineer to join our design and development team, responsible for the full-cycle development of an innovative 4D imaging radar for the automotive sector. You will take a lead role in design and implementation of real-time software for a multi-core automotive SoC platform, consisting of embedded cores, DSPs and dedicated accelerators.

What will you do?
Be part of full-cycle development of embedded SW for innovative automotive radars
Take a lead role in embedded system SW design and implementation on the industrys cutting-edge embedded SoC
Integrate the teams SW over the real-time embedded controller. Bring SW to validation readiness to the validation team. Bring SW to the test vehicles
Specify and balance system-SW requirements to achieve the run time restrictions of the compute platform
Work in collaboration with the CTO and Algorithms team

Required CPU Design for Test Engineer, Cloud
About the job
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.
Responsibilities:
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.

we are looking for a talented Hardware Board Designer to join our multidisciplinary R&D team. This is an exciting opportunity to take part in the design and development of advanced electronic systems, working alongside hardware, firmware, software, and system engineers from concept through integration.
We are looking for a creative, hands-on engineer with a passion for hardware design and a desire to work on cutting-edge technologies.
Responsibilities
Design and develop complex electronic boards from concept to production.
Perform hands-on schematic design and component selection.
Support and guide PCB layout activities.
Prepare and present design reviews.
Collaborate closely with firmware, software, RF, and system engineering teams to ensure successful system integration.
Develop advanced multidisciplinary systems incorporating:
CPUs / SoCs
FPGA-based designs
Analog and mixed-signal circuits
High-speed interfaces (DDR, PCIe, Ethernet, LVDS, etc.)
RF transmit and receive chains
Filters and amplifier circuits
Power supply and power management circuits
Support board bring-up, debugging, validation, and troubleshooting.

We are looking for a talented Algorithm Engineer to join our team and help shape the next generation of products.

In this role, you will develop and optimize algorithms for database operations running on our hardware accelerator, improve performance, and enable new capabilities.

You will gain a deep understanding of the entire stack from systems and applications to software and hardware and work across different parts of the codebase.

Responsibilities:

Researching state-of-the-art algorithms and techniques for data analytics and hardware acceleration

Implementing these algorithms in software, then simulating and optimizing their performance

Working closely with software and hardware engineers

Participating in design reviews and contributing to key design decisions

Required Senior Silicon Physical Design Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Physical Design Engineer, you will collaborate with functional design, Design for Testing (DFT), architecture, and packaging engineers. In this role, you will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.
Responsibilities
Use problem-solving and simulation techniques to ensure performance, power, and area (PPA) are within defined requirements.
Collaborate with cross-functional teams to debug failures or performance shortfalls and meet program goals in lab or simulation.
Design chips, chip-subsystems, or partitions within subsystems from synthesis through place and route, and sign off convergence, ensuring that the design meets the architecture goals of power, performance, and area.
Develop, validate, and improve Electronic Design Automation (EDA) methodology for a specialized sign off or implementation domain to enable cross-functional teams to build and deliver blocks that are correct by construction and ease convergence efforts.