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We are redefining urban mobility by proving that autonomous vehicles can navigate complex environments using vision-only technology.
As our Hardware Systems Integration Engineer, you will be the lead architect responsible for the "nervous system " of our vehicles. You won't just be selecting components; you will be evaluating infrastructure that enables our AI software to see, process, and React to the world in Real-Time.
Responsibilities:
* Vision-Centric Architecture: Lead the selection and integration of high-dynamic-range (HDR) automotive-grade cameras.
* Compute Platform Selection - Evaluate and benchmark high-performance edge platforms (e.g., NVIDIA Orin, Qualcomm Snapdragon, Ambarella, or custom SOC solutions) capable of handling massive parallel video streams with minimal latency.
* Thermal & Power Integrity: Design integration of computing HW into automotive grade environment. This work can be done with external suppliers.
*  system Synchronization: design and ensure sensor synchronization.
* Redundancy Planning: architect fail-operational hardware systems to ensure the vehicle remains safe even if a specific component or communication bus fails.
* Present to and consult with the group leaders as to hardware design trade-offs

abra professional services is seeking for an Field Technician We are looking for a Field Technician – Certified Electrician to join the Operations team and support the maintenance and operation of cellular network infrastructure in the Northern region. The role involves extensive field work, including configuration, maintenance, and troubleshooting of cellular sites, radio equipment, and transmission systems. The technician will be responsible for ensuring network availability, performance, and quality while working in dynamic and sometimes challenging environmental conditions. Key Responsibilities:
* Maintenance and operation of cellular network infrastructure
* Configuration and commissioning of cellular sites, including radio and transmission equipment
* Troubleshooting and resolving faults at cellular sites
* Integration of cellular sites, including RF chains, antennas, radio systems, and transmission equipment
* Installation, operation, and maintenance of AC/DC power systems
* Field work under varying environmental conditions
* Participation in on-call rotations, including nights, weekends, and holidays

we are seeking a Director of AI & Agentic Systems to lead the companys core intelligence capabilities, which form the foundation of competitive advantage and proprietary IP. This is a senior, vision-setting leadership role responsible for guiding the evolution of AI capabilities from DSP, signal processing and machine learning to agentic and autonomous decision systems deployed in real-world operational environments.
In this role, you will set the long-term direction of AI platform and lead multidisciplinary teams across Signal Processing, Machine Learning, and GenAI and Agentic technologies. You will ensure raw sensor data is transformed into trusted insights and actions, influence architectural decisions across edge and cloud environments, and drive the next generation of industrial AI capabilities across the company.

we are looking for forward-thinking, self-motivated engineers who thrive in fast-paced environments and "crisis times." Beyond technical excellence, successful candidates are:
Intrinsically, see the importance of every detail in "elegant solutions."
Excellent interpersonal and communication skills to work across diverse functional areas.
Schedule-driven with a desire to solve challenges that have never been solved before.
Responsibilities
Micro-Architecture & RTL: Design and implement high-quality, power-efficient RTL (Verilog/SystemVerilog) from block-level to sub-system levels.
Cross-Functional Collaboration: Partner with Architecture, Algorithm, Software, and Physical Design (PD) teams to translate product requirements into GDS-ready silicon.
Front-End Flow Management: Take ownership of "correct-by-construction" design tasks, including Synthesis, Lint, CDC/RDC (Clock/Reset Domain Crossing), and STA (Static Timing Analysis).
Verification Support: Work closely with Design Verification (DV) and Formal Verification teams to define coverage requirements, develop testbenches, and debug functional/performance issues.
Post-Silicon & Validation: Support pre-silicon emulation (FPGA, Palladium) and post-silicon validation in lab environments to ensure spec compliance.

In this role, you can lead our teams to deliver fully functional "first silicon" IP designs, from defining initial constraints through high-quality tape-out. You will have the rare and rewarding privilege of crafting upcoming products that will delight and inspire millions of customers every single day.
Responsibilities
Own the entire IP-level netlist generation and timing convergence journey, from synthesis and UPF power intent to final sign-off.
Architect and manage complex timing constraints (SDC) for both standard and custom designs, ensuring sign-off quality from day one.
Drive Full Chip and block-level timing/noise convergence, including hierarchical timing flows and power optimizations.
Collaborate closely with RTL designers to understand clock architecture, DFT teams on mode constraints, and PNR teams to achieve flawless physical convergence.
Develop and support automated block and chip-level sign-off flows, working with CAD teams to shape cutting-edge methodologies that eliminate pessimism and accelerate convergence.
Perform deep-dive signal integrity (SI) and noise analysis, drive custom IP integration, and generate block-level budgets to ensure correlation with the Full Chip.

As a Design Verification Engineer, you will be responsible for ensuring "bug-free first silicon" for complex IP and SoC designs. You will drive all phases of pre-silicon verification, from defining methodologies and test plans to RTL freeze and tape-out sign-off. These roles are highly collaborative, requiring close interaction with architecture, design, and software teams across global sites.
Responsibilities
Architect and develop scalable, portable verification environments, including UVM-based testbenches, protocol monitors, agents, and checkers.
Define detailed test and coverage plans based on micro-architecture specifications and extract features for DV attributes.
Create and simulate test scenarios, perform advanced debugging, and conduct end-to-end simulations of data/control paths.
Drive regression and coverage analysis (metric-driven verification) to ensure the highest quality, productivity, and time-to-market.
Partner with architects and designers from the early stages of feature definition to influence IP/SoC specifications.
Apply formal verification, hardware acceleration, and power/performance (NLP) analysis where applicable.

We are looking for a Mid-level Data Engineer to join our growing Data/MLOps team. The team is focused on building a Data/MLOps infrastructure to support the development of ML and AI algorithms for our next generation iTero scanners.
The position is suited for engineers who like to work with data, build data infrastructure and wish to support algorithm engineers.
The position is based at our Petah Tikva or Caesarea site.
Key Responsibilities
Own significant components in a data infrastructure for AI/Algorithm development.
Work with large image/3D datasets to support the development of real-life ML/AI solutions.
Work with ML / AI engineers to identify future challenges and solutions.
Own the quality of data ingestion pipelines over time.
Consistently demonstrate innovative thinking, strong partnership and high work ethics.

In these roles, engineers will be responsible for the design, development, and bring-up of innovative silicon and system solutions across multiple specialized teams. Responsibilities include participating in SW design sessions, providing HLD and LLD documentation, and coding complex modules that serve as the foundation for our device ecosystem. You will lead HW-SW integrations, debug complicated system-wide bugs with limited visibility, and optimize designs for performance, power, and memory footprints while meeting hard-real-time latency requirements.

This is a highly visible role where you will own the physical design cycle at the partition, IP, and Chip levels-enabling us to produce fully functional "first silicon" designs. Do you love working on challenges that no one has solved yet? If you are ready to join the world's leading engineers and work with state-of-the-art design flows, come join our group.
Responsibilities
You will be responsible for all phases of pre-silicon development, from initial definition to high-quality tape-out (Netlist to GDSII).
Lead block-level Place & Route (PnR), complex floor-planning, partitioning, and the creation of power domains and grid specifications.
Develop and validate high-performance, low-power clock network guidelines and distribution.
Drive static timing closure (STA), Physical Verification (DRC/LVS), and Electrical/Power analysis (EM, IR-Drop, Xtalk, and Noise).
Participate in establishing CAD and physical design methodologies for "correct-by-construction" designs and assist in flow development for chip integration.
Generate and implement ECOs to fix timing, noise, and EM/IR violations while meeting strict area and power constraints.
Work closely with logic design teams on SoC architecture and HDL (Verilog) to implement timing fixes and design optimizations.

About Silk Silk is redefining how enterprises adopt and scale in the cloud by providing a high-performance virtual SAN for cloud environments. Our platform helps organizations run mission-critical applications with maximum performance and efficiency in the cloud. Headquartered in Needham, MA and backed by Sequoia Capital, Silk continues to experience rapid growth as enterprises modernize their infrastructure. Learn more at silk.us About the Role We’re seeking a Technical Account Manager (TAM) to serve as a trusted technical advisor for a portfolio of strategic Silk customers. You’ll ensure customers realize the full value of the Silk Platform - from onboarding through ongoing optimization - by bridging technical expertise with a deep understanding of their business goals. You’ll work within the Customer Success team and across the broader Go-To-Market organization to deliver world-class customer experience and long-term adoption. This role is ideal for someone passionate about cloud performance, enterprise technology, and building strong technical relationships with customers. What You’ll Do Customer Engagement & Technical Partnership
* Serve as the primary technical expert and trusted advisor for assigned customers.
* Partner with the Onboarding Manager to ensure smooth onboarding and seamless adoption of Silk solutions.
* Host regular customer meetings to provide technical guidance, performance insights, and strategic recommendations Lead customer training and enablement sessions to deepen understanding and drive broader platform adoption.
* Collaborate with Customer Success Managers to support QBRs, renewals, expansions, and overall account health Technical Excellence & Optimization
* Proactively engage with customers to review upgrade schedules, configuration best practices, and usage trends - identifying opportunities to optimize performance, efficiency, and overall platform utilization.
* Translate complex technical concepts into clear, actionable business insights for diverse audiences.
* Maintain and document customer architectures, configurations, and technical recommendations.
* Ensure customers stay current with product updates and continually realize value from the Silk platform. About You You thrive in fast-moving, customer-centric environments and enjoy combining technical expertise with relationship management. You’re curious, self-directed, resourceful, and motivated to make an impact. Preferred qualifications:
* 5–7 years of experience as a Technical Account Manager, Solution Architect, Sales Engineer, or in enterprise technical support or related roles.
* Strong understanding of cloud infrastructure (Azure, GCP, AWS) and enterprise workloads (e.g., Oracle, SQL Server).
* Excellent communication and presentation skills with both technical and business audiences.
* Proven ability to manage complex technical projects and collaborate across functions.
* Highly organized, self-directed, and excited to shape how Silk supports its strategic accounts. Nice to have:
* Experience with Customer Success platforms (e.g., Gainsight, Totango, Planhat) is a plus.
* Experience with automations or workflow optimization is a plus. Silk recognizes that talent and potential come in all forms and that years of experience does not guarantee on-the-job success or leadership potential. Our hiring process involves recognizing a person’s achievements, skills & knowledge, and passion; not just check-marks next to a job description. If you have an interest in any of our roles, please do not hesitate to apply - we would be happy to speak with you.

About Silk:
Silk makes it possible for organizations to cloud their way. Helping organizations win in the cloud is what we do. Our culture is who we are. We are empowered. We are positive thinkers. We think boldly and always speak our minds. We go big, or we go back to the

we are looking for a Software Development Manager.
As a Software Development Manager, you'll lead an elite team of development engineers to define, drive and execute on our product vision. You will invent and ship software that directly impacts our end customer experience. You'll develop your team of highly motivated and talented builders who can collaborate with applied scientists, product managers, technical specialists, and principals across the company.
Responsibilities:
- You'll lead the overall development life cycle of software solutions and manage complex projects with significant impact.
- Coordinate with your senior engineers to develop the best technical design and approach for product development.
- Assure that your team's designs meet requirements, and deliver high-quality work on tight schedules.
- Prioritize, plan projects and features, manage partners, and track external commitments.
- Monitor operation of production services to ensure Operational Excellence.
- Foster the career development of your direct reports.

we are looking for a Hardware Lead Engineer.
As HW Lead Engineer, in the Nitro team, you will be responsible for defining Annapurna Labs Smart Network Interface Card (NIC) design, leading development and validation cycles, and bringing the product to healthy mass production.
Youll provide leadership in new technologies, bringing them to large-scale deployment, in a continuous effort to deliver a world-class customer experience. We offer a fast-paced, intellectually challenging position, where youll work with technical experts, senior leaders, covering multiple technologies. We are changing the industry, and looking for individuals who are ready for this challenge and want to reach beyond what is possible today.
Key job responsibilities:
- Define the architecture and design specifications of next generation K2 Nitro Cards.
- Own full product life cycle, engage with design partners and manufacturing sites to enable high-yield mass production.
- Lead the analysis and debugging of complex design, manufacturing, and integration challenges.
- Continuously design for process optimization to improve product quality, simplify workflows, and accelerate the Nitro card development lifecycle.