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We are looking for best-in-class Chip Design Verification and Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Take a crucial part in developing our next-generation chip controller.

Design and verification with challenging multi-discipline context.

Take part in the development of all our networking and GPU networking chips and systems.

We are looking for best-in-class Physical Design Power Engineer to join our outstanding Networking Silicon Power engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput, lowest latency and best Power! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you will be doing:

Power Optimization of Physical design, of blocks/top-level/fc under challenging constraints.

Optimization involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise fixes.

Power estimation and power modeling.

Nuvoton Israel , a leading supplier of custom SoCs and security hardware solutions in the computing and server business, is seeking a skilled and experienced Analog Layout Designer to join our team in Herzliya. As a member of the layout team, you will be responsible for delivering high-quality analog layout for modules integrated into our advanced ASIC ICs.

The XR Tech Research team is seeking highly motivated Research Interns to join us in advancing the next generation of video and image generation technologies. Our team is dedicated to conducting foundational, state-of-the-art research in video generation, with a strong focus on pushing the scientific and technical boundaries of generative AI to enable future immersive and interactive experiences. As a Research Intern, you will work alongside leading experts in computer vision, generative modeling, and multimodal learning, contributing to projects at the frontier of large-scale video and image generation models. Our work not only advances the academic field but also lays the groundwork for future XR systems and applications, shaping how people will interact, create, and connect in virtual and real-world environments. About the Team The XR Tech Research team has a long-standing history of groundbreaking contributions to generative AI research across modalitiesfrom images and video to 3D and beyond. We are at the forefront of advancing foundational video generation models, collaborating with world-class research groups, and driving the next wave of innovation in immersive technologies. Our work is both academically impactful and tightly connected to real-world applications, enabling breakthroughs that redefine the future of XR.
Research Intern, Video & Image Generation (PhD) Responsibilities
Conduct research on advanced topics in video and image generation, including but not limited to generative diffusion and transformer architectures, spatio-temporal modeling, and multimodal integration.
Design, implement, and evaluate novel algorithms and model architectures.
Collaborate closely with researchers and engineers across the XR-Tech group and broader FAIR/GenAI teams.
Contribute to publications in top-tier conferences and journals in AI, computer vision, and machine learning.
Present findings and share insights that help shape both ongoing research and future directions.

We are now looking for a Chip Design Verification Engineer. We are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.

What you'll be doing:

Develop shared verification code and solutions to be widely used by the chip design team.

Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.

Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.

Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.

Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.

Collaborate with designers, verification specialists to accomplish your tasks.

Develop training sessions.

We are looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.


What you will be doing:

STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.

Taking part inflows development.

We are looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW development, architecture, chip design teams and gain deep understanding of NVIDIA's Networking products and technologies. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!

What youll be doing:

Work on NVIDIA current and next generation of Networking devices and GPU.

Build and create Firmware Phy solutions for our new SerDes and physical linkup flow.

Work closely with our costumer support team to build solutions for our costumers.

Work with the architecture, HW, and SW design teams.

Debug and screen HW/FW/SW issues.

Lead data-driven discussions about the product functionality and areas for improvement.

Define implement and maintain FW algorithm to control the Silicon.

Take an active part in silicon bring-up and SW development phases.

Hardware Design Engineer Requirements
Leading top-down product development and management across organization functional teams.
Provide full accountability and substantial value for business operation.
Hands on developing digital logic designs handling the entire design aspects: Architecture.