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We are looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

The Data Path HAL team is looking for an Embedded Software Engineer (Junior), to join us in building the next generation of networking products. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, fast-paced environment.
Working in both pre-silicon and post-silicon activities defines the Data Path HAL team as a leading team in AWS software development.

In this role you will be leading tasks involving peers from multiple disciplines, while enjoying every step of the journey.
You will have the opportunity to work on the heart of the network engine, at the worlds largest cloud provider, in a dynamic, open, fast-paced environment.

We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities:
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

We are looking for a Senior Machine Learning Algorithm Engineer who is passionate about solving complex, real-world problems at the intersection of hardware and software.
Location: Haifa \ Tel-Aviv in hybrid model.
Responsibilities
Develop advanced ML algorithms using data from our Agents embedded in silicon. Example domains include:
Lifetime predictions
Clustering and dimensionality reduction
Parametric modeling and screening
Time-series forecasting
Lead end-to-end algorithm lifecycle: ideation → research → POC → design → implementation → validation → deployment.
Collaborate closely with cross-functional teams and directly with customers to continuously refine and enhance deployed solutions.
Drive integration of AI-enhanced tools and intelligent pipelines into ML workflows.

As a Chip Design Engineer on the Nitro team, you will take full end-to-end ownership of one or more critical IP blocks within the product, guiding them from micro-architecture definition through RTL design, debug, synthesis, timing closure, and final sign-off before tape-out. Your work will ship in silicon that powers AWS at global scale.
You'll partner closely with the Verification and Emulation teams to shape test plans, review coverage, and close gaps early in the design cycle. Beyond your own IP, you'll collaborate across disciplines with Product Definition, Software, Physical Design, and Verification teams to deliver a fully integrated, production-ready chip.

A leading and innovative company in the field of cyber threat intelligence is looking for an experienced Engineering Group Leader to join the executive team and lead the technological development efforts. The role includes managing and building full-stack engineering teams, overseeing architecture and product development, recruiting engineers, defining development processes and technology standards, and driving a tech strategy that supports the companys growth and business goals.

What Youll Be Doing

Lead and manage multiple engineering teams, including team leads and senior engineers.
Mentor, coach, and develop engineers and engineering leaders, fostering a strong growth-oriented culture.
Take end-to-end ownership of delivery, quality, and reliability for your groups products and services.
Translate high-level engineering and product strategy into clear execution plans and milestones.
Collaborate closely with Product Management to plan roadmaps, prioritize work, and align on scope and delivery.
Participate in architectural discussions and contribute to technical and design decisions.
Implement, maintain, and continuously improve development processes (Agile/Scrum).
Play an active role in hiring, onboarding, and retaining top engineering talent.
Work closely with other engineering managers and senior leadership to ensure alignment across teams and domains.

In this role you will develop system level software, targeting chip architecture, functional correctness and performance, running on various platforms and validating chip functionality.

We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification in our company isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development
What sets us apart:
Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips.
Cutting-edge methodologies drive every stage of our verification process
Relentless innovation - we don't settle; we actively seek new approaches that raise the bar on silicon quality.
We do classic functional verification(SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure that the quality of our silicon is beyond logical functionality.
Performance optimization at all levels it is at the heart of our targets on top of logical correctness verification.
If you want to be at the nerve center of chip development - where your work connects every discipline and powers the backbone of AWS Graviton - this is your team.

In this highly-visible role you will assume responsibility over a full range of DFT in an extremely challenging project, leading a talented team of engineers, working closely with frontend and backend teams. You will participate in architecture and design reviews, create design solutions for testability, debug ability, reliability and yield improvement. You will provide design constraints for implementation and sign-off. You will build work plans, drive and track their execution. You will be closely involved in silicon bring-up, reliability testing and advanced physical failure analysis activities, and will be responsible for getting a high-quality product out into AWS fleet for millions of our customers quickly. Come and join us as we work hard, have fun, and make history.

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment. As a Wireless MAC System Architect, you will be a core member of our highly innovative and visible Wireless System-on-Chip (SoC) design team that defines modem architectures, develops MAC-layer algorithms, and invents embedded DSP algorithms for chips enabling exciting new wireless applications. You will be responsible for developing state-of-the-art wireless SoC products that are enjoyed by millions of our customers. Application areas include ultra-wideband sensing and specialized wireless audio; products enabled or improved by our teams SoCs include specialized audio headsets (such as AirPods), watches and iPhones.

In this role you will be responsible for the architecture of the Connectivity IP with focus on the MAC sub-system: - Define, document and Spec Connectivity MAC architecture and performance requirements.
- Analyze & simulate the performance of the Connectivity IP in real-life use-cases, achieving benchmarking performances in several metrics, including Throughput, Robustness, Co-existence with other Wireless IPs and more.
- Working closely with other architects (PHY, Power Management, FW and SW) to introduce best in class Connectivity IP solution.
- Develop innovative system architectures and protocols to deliver best-in-class performance for the MAC subsystem of custom wireless silicon solutions.
- Introduce cross-domain features where opportunities exist for innovation to achieve enhanced performance.
- Produce MAC architecture, specifications and corresponding performance/reference modeling in support of digital HW and FW design and verification efforts.
- Develop and maintain a MAC systems infrastructure applying the best methodologies for system-level simulation, pre-silicon prototyping (including emulation and FPGA prototyping), FW QA, regression and MTBF testing, and system verification to ensure first-time design success.
- Support the delivery of new wireless technologies to the Product Systems teams.

We are seeking a CAD LEQ (Logical Equivalence Checking) Engineer to develop, deploy, and support equivalence checking methodologies across complex SoC programs. This role focuses on ensuring functional correctness between RTL, synthesized netlists, and post-implementation designs, while driving scalable, robust sign-off flows.

Responsibilities
Own and maintain LEQ sign-off methodology across RTL-to-GDS flows.
Develop and support flows using tools such as Cadence Conformal and equivalent industry solutions.
Drive power-aware equivalence checking including CPX flows.
Enable ECO flows, ensuring safe and correct implementation of late-stage design changes.
Debug equivalence failures and perform root-cause analysis across RTL, synthesis, and PnR stages.
Collaborate with design, synthesis, PD, and power teams to resolve mismatches and improve convergence.
Optimize runtime, capacity, and scalability of LEQ flows for large SoCs.
Define best practices, guidelines, and automation for LEQ usage across projects.
Partner with EDA vendors to resolve tool issues and drive feature improvements.

Join a highly skilled engineering team building core storage infrastructure across multiple system layers. You'll develop and enhance frameworks that handle disk image operations, provide unified storage abstractions, and enable cutting-edge virtualization technologies. This role requires both breadth and depth, comfortable working from kernel-level drivers to user-space frameworks, debugging complex multi-layered systems, and collaborating across hardware, kernel, and application teams. You'll participate in all phases of development: architecture, implementation, optimization, testing, and integration with deeply integrated platform features.

Responsibilities:
Develop kernel-level storage components and user-space frameworks for macOS and our other platforms.
Optimize I/O performance, resource utilization, and power efficiency across the storage stack.
Debug and resolve complex issues spanning hardware, firmware, kernel, and user-space boundaries.
Collaborate with cross-functional teams, including hardware, kernel, filesystem, and virtualization engineers.
Write comprehensive test suites, performance benchmarks, and technical documentation.
Contribute to architecture decisions and long-term technical direction for storage systems.

A hands-on engineering role focused on building production-grade AI/ML systems and the automation infrastructure that supports them - driving AI adoption into developer workflows, internal tooling, and domain-specific applications across the organization.

As a member of the AI Infrastructure & Applications team, you will lead the design, development, and production deployment of AI/ML-powered systems alongside the automation infrastructure and developer platforms that support them.
You will architect intelligent, scalable solutions used across the organization - driving AI adoption into developer and automation workflows, internal tooling, and domain-specific applications - while also building and maintaining the automation frameworks and infrastructure those systems depend on.
The systems you build are expected to be production-grade, reliable, observable, and continuously improving.

Responsibilities
Architect and ship end-to-end AI-powered applications and pipelines, from prototype to production.
Build agentic systems, RAG pipelines, and tool-use patterns that integrate LLMs into real workflows.
Define and own AI quality metrics (accuracy, groundedness, hallucination rate, task completion) and integrate them into CI/CD release gates.
Design evaluation frameworks for non-deterministic systems: offline evals, human-in-the-loop review, and automated regression suites.
Harness AI/LLMs to extend and enhance existing automation infrastructure, improving system performance and operational efficiency.
Build scalable automation frameworks, APIs, and tooling used across the organization.
Collaborate with engineering, CI, and domain teams to address automation needs across hardware, software, and cloud.
Distill requirements from a large, diverse user base into generic, reusable, maintainable solutions.
Implement monitoring, drift detection, and structured feedback pipelines for continuous improvement.
Apply rigorous engineering discipline - test design, release criteria, rollback strategies - to AI-native deployments.
Partner with product, design, and domain experts to define use cases, acceptance criteria, and rollout plans.

Develop and maintain internal EDA tools and frameworks for RTL assembly and connectivity checking.
Implement efficient algorithms for hierarchical RTL construction, module binding, and interface consistency across complex SoCs.
Build intelligent connectivity, visualization, and debug utilities.
Collaborate with front-end design, DFT, and integration teams to align methodologies and define tool requirements.
Drive automation and performance improvements, including runtime optimization and scalability across large designs.
Support adoption, documentation, and user training for internal design teams.

we are looking for a AI Backend Engineer.
As the AI Backend engineer , you will join a team of highly skilled machine learning engineers in developing and deploying advanced AI/ML solutions that power our identity and security products. Youll utilize technical skills to drive innovation, ensure delivery of high-impact projects, and scale our data-driven capabilities across the organization.
This role requires both strategic thinking and hands-on expertise. Youll be responsible for shaping the data science roadmap, mentoring a growing team, and collaborating with product, engineering, and business stakeholders to translate business challenges into practical machine learning solutions.
What youll do:
Design, develop, and maintain backend services for AI agents and tool integrations using latest technologies
Build scalable APIs and microservices that interface with LLMs and AI frameworks
Implement agent orchestration systems, tool calling mechanisms, and workflow engines
Optimize performance and reliability of AI-powered applications at scale
Develop data pipelines for training, evaluation, and monitoring of AI systems
Integrate with various LLM providers (OpenAI, Anthropic, etc.) and manage API interactions

Lead the team building the agentic infrastructure powering Klaudia - our AI SRE. You'll own the architecture, set the technical direction, and push experimental ideas into production.

This isn't a coordination role. You'll be a technical leader who builds alongside your team - setting the bar for architecture quality, driving experimental bets, and turning research into production-grade systems.



What will you do?

Own the agentic infrastructure- You're responsible for the architecture of Klaudia's core - the systems that make autonomous investigation, root cause analysis, and self-healing possible at scale.

Build and grow your team- Hire great engineers, mentor them, run meaningful design reviews, and build a culture of high ownership and engineering excellence.

Drive experimental development- Run structured bets - LLM evaluation frameworks, new agent architectures, novel tool-use patterns - and bring the best ones to production.

Stay hands-on You'll design systems, review PRs critically, and write code where it matters. Your technical credibility is the foundation of your leadership.

Shape our AI strategy- Work closely with product and R&D leadership to define what Klaudia becomes next.



Why this role rocks?

Category-defining work- AI SRE is the hottest space in cloud infra. You'll be leading the team that defines what it means - not catching up to anyone.

Real autonomy- You'll set the technical roadmap for Core. No pre-solved problems handed down to you - you decide what gets built and how.

Build something that lasts- Hire and shape a team from an early stage. Your engineering culture decisions here will compound for years.

Serious engineering culture- High bar for craft, strong team around you, and leadership that respects technical depth over process theater.