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looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.

looking for an hpc and ai data center engineer to join the networking cloud solutions hpc/ai infrastructure team. we are focused on building supercomputers and hpc clusters based on groundbreaking technologies. we are looking for a lab manager, be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and gpu computing. take part of building large-scale compute and deep learning software and hardware platforms, work together and support many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions.
what you will be doing:
plan and build complex cluster and supercomputers in various of data center and labs
rack stack and cable management to ensure efficient use of space and easy maintenance
ensure data centers and labs power and cooling efficiency while optimizing rack space utilization
data centers and labs daily operation and support
installations for variety of infrastructure and solutions - cloud, vms, Storage, network, hpc and ai
perform troubleshooting - network, optic cabling, bare metal, operating system.
support research & development activities

join our growing software architecture research team. the ideal candidate will be conducting cutting-edge research at the intersection of networking, security, and communications, and working alongside top experts in these fields. with incredible resources in networking, you will be able to impact, contribute and advance these domains for scalable accelerated computing. topics include but are not limited to remote direct memory access, hardware offloading and hardware acceleration, distributed accelerator networks, ai for networking and security, Storage management, cryptography accelerators and architecture. with its unique open culture, nvidia is one of the best industry labs to do accelerated computing research.
 
what youll be doing:
develop novel hw architecture models
simulations ranging from specific components to complete data center environments
develop sdks for novel hw capabilities
designing and implementing services, runtime systems, and applications over sdk
evaluate and optimize application performance
partner and collaborate with other forward-thinking team members and external researchers
participate and speak at conferences and events
work with intelligent networking machines powered by ai systems that can learn, reason and interact with other network components

as a senior architect in the advanced development team, you will explore technological challenges on accelerate networking and building ai data centers. research new transport functions and semantics for optimizing ai workloads. you will also be leading architectural and development efforts across numerous technological fields, related to the modern data center, such as distributed ai and deep learning solutions, data analytics, high performance computing (hpc), software defined networking (sdn), virtualization, Storage, and more.
what youll be doing:
enhance gpu networking offerings for accelerating ai workloads, such as dynamo or nvidia nixl.
identify and evaluate new technologies, innovations and partner relationships for alignment with our technology roadmap and business value.
lead architecture and design of such technologies.
lead proof-of-concept development to evaluate and drive such technologies.

we are now looking for a senior verification technical lead for our fc switch silicon team. as a fullchip verification technical lead engineer  networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a fc verification team within the switch silicon.
dynamic verification environments planning for units infrastructures and system level
work closely with multiple teams within organizations such as architecture, u-arch, full chip micro-architecture, be, and fw
responsible to drive the fullchip verification execution, including staging plan of the projects and deliveries

our radar team develops cutting-edge radar technology for autonomous driving (av) and advanced driver-assistance systems (adas). we are looking for a Cyber security architect to lead the design and implementation of robust security solutions that protect our radar systems from cyber threats.
in this role, you will define security architecture for radar hardware, Embedded software, and communication interfaces, ensuring compliance with automotive cybersecurity standards and safeguarding mobileyes mission-critical sensing technology.
youll be part of a team shaping the future of autonomous driving. our radar technology is a critical component in delivering safe, reliable, and intelligent mobility solutions. youll work on innovative projects in a collaborative environment, with the opportunity to influence security strategy at a global scale. what will your job look like?
security architecture design - develop and maintain end-to-end security architecture for radar systems, including hardware, firmware, and software components.
threat modeling & risk assessment (tara) - perform threat analysis and risk assessment for radar components, software modules, and communication channels; identify vulnerabilities and design mitigation strategies.
secure communication - implement encryption, authentication, and integrity checks for radar data transmission between hardware and software layers.
secure software design - define and enforce security controls for apis, middleware, and integration points between radar systems and other vehicle subsystems.
compliance & standards - ensure radar systems meet iso 21434, unece wp.29, and other relevant automotive cybersecurity regulations.
collaboration with r&d - work closely with radar engineers, Embedded software developers, and system architects to embed security into the design process.
incident response support - provide architectural guidance during security incidents involving radar systems.
technology evaluation - assess and recommend security tools, frameworks, and methodologies for radar-specific applications.

which department will you join?
epg is a fast-paced, dynamic, and startup-like group responsible for researching, incubating and developing next-generation technologies and ideas, with a strong orientation towards computer vision, Machine Learning, data, and ai.
the group hosts a diverse team of scientists, engineers and developers to research, realize, and bring to market innovative new products, leveraging cutting-edge technologies, skills and capabilities.
were looking for a backend expert to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out. what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

we are looking for an experienced Hardware Design Engineer with a strong background in high-speed board design to join our radar hw group.
our imaging radar organization develops automotive radar systems that enable advanced driver assistance and fully autonomous driving. the radar hw group has multidisciplinary responsibilities and owns the end-to-end development of all radar hardware which includes: RF and high-speed digital boards, ic packages, mechanical solutions & antenna design
what will your job look like?
design high-speed boards from concept to production
own all design stages: architecture, schematics, layout, modeling, and design reviews
work on boards that include high-speed serdes, lpddr5/4, power circuits, and additional digital interfaces
collaborate closely with RF, mechanical and system teams.

we are seeking a highly skilled systems integration and Validation engineer to join our dynamic team in the automotive industry. the ideal candidate will have a strong background in system development, integration, and testing, with at least 5 years of relevant experience. as an integration engineer, you will play a key role in integrating and validating a complex automotive system, ensuring they meet the highest standards of quality, performance, and reliability. what will your job look like:
system integration: collaborate with cross-functional teams to integrate various subsystems and components into a cohesive automotive system, ensuring compatibility and functionality.
risk management: identify potential risks and issues related to system design and implementation, and develop mitigation strategies to ensure project success.
documentation and reporting: create comprehensive documentation, including system designs, TEST reports, and technical specifications. provide regular progress updates and reports to management and stakeholders.
testing and validation: develop and execute TEST plans and procedures to validate system performance, reliability, and safety according to industry standards and regulations.

our SOC verification group owns the important and challenging job of verifying mobileye's chip. it is involved from product specification to final SOC delivery, and involves all the system components. the group is made up of few of the best Verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams. what will your job look like:
you'll be responsible for pre-silicon system -level verification of the most cutting-edge ai accelerators and technologies in the automotive field.
define the testplan, develop and run tests on simulation/emulation environments, develop TEST environment and verification collaterals.
you'll have a broad effect on our unique product from the very beginning of the process.

Our SOC verification group owns the important and challenging job of verifying mobileye's chip. it is involved from product specification to final SOC delivery, and involves all the system components. the group is made up of few of the best Verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
what will your job look like:
you'll be responsible for pre-silicon system -level verification of the most cutting-edge ai accelerators and technologies in the automotive field.
define the testplan, develop and run tests on simulation/emulation environments, develop TEST environment and verification collaterals.
you'll have a broad effect on our unique product from the very beginning of the process.

the road algorithm team is responsible for one of the most critical and challenging tasks in autonomous driving - detecting and understanding the drivable road. our work leverages deep neural networks and geometric modeling to deliver reliable and high-quality road perception for autonomous vehicles.
we are looking for an expert deep learning Research Engineer who will both drive independent deep learning research and collaborate closely with other developers to help unlock new directions, solve complex challenges, and elevate the teams algorithmic capabilities. what will your job look like:
conduct hands-on research and development of deep learning algorithms for road understanding, drivable area detection, and scene structure modeling
lead exploratory investigations into new architectures, training strategies, and data utilization methods
join forces with other developers to troubleshoot difficult problems, introduce new ideas, and guide technical decisions
own projects end-to-end - from concept and experimentation to integration and scalable deployment

which department will you join?
our hw team - a group designing the eyeq chips for adas and autonomous cars. the group is responsible for all disciplines of development, including but not limited to logic design, design verification, microarchitecture, analog and circuit design and layout, physical and structural design ( backend ), product and TEST engineering.
each physical design engineer has an end to end responsibility from definition, execution & full signoffs, working closely with design & architecture teams for constraints development, design review & rtl modifications to achieve converges were looking for a physical design engineer to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out. what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

which department will you join?
epg is a fast-paced, dynamic, and startup-like group responsible for researching, incubating and developing next-generation technologies and ideas, with a strong orientation towards computer vision, Machine Learning, data, and ai.
the group hosts a diverse team of scientists, engineers and developers to research, realize, and bring to market innovative new products, leveraging cutting-edge technologies, skills and capabilities.
were looking for a backend expert to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out.
what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.

we are seeking a highly motivated system Software manager to lead a team driving the development of next-generation communication software and products, building on our industry-leading nvlink and nvswitch technologies. this role combines technical leadership with hands-on development activities, driving innovation at the core ofdata center ecosystem.
what you will be doing:
lead, mentor, and grow your engineering team while overseeing project planning, execution, and ensuring the quality and performance of all deliverables.
own major features and drive the teams roadmap that aligns with ambitious goals and dynamic customer requirements.
grow the local team while collaborating with a wide range of cross-business unit teams both on-site and locally.
continuously evaluate and identify opportunities to improve processes, infrastructure, and practices to ensure efficient, transparent, and high-quality team execution.
this is a technical leadership role, with active involvement in feature design and implementation.