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We are looking for an HW electrical engineer to join our Failure Analysis engineering team under the System Product Engineering group in the company. You will work in a multidisciplinary environment with customers, contract manufacturers, and vendors. This job allows you to work in sophisticated, high-end technology with state of the art products, exciting engineering environment and having a great impact on top technology products, mass production processes, quality and reliability of the company networking products.
What you'll be doing:
Root Cause Analysis and Test Planning: You will perform in-depth root cause analysis by meticulously analyzing failure modes and devising comprehensive test plans. Your expertise in planning and executing tests will be instrumental in pinpointing the underlying causes of failures.
Big-Data-Driven Analysis: Utilizing cutting-edge big-data tools, you will correlate customer-reported failures with production data and RMA history. This data-driven approach will enable you to gain valuable insights into root causes, identify potential risks, and assess the overall exposure of quality issues.
Leading Cross-Organizational Task Forces: You will be responsible for managing and leading cross-functional teams to address quality events and failure modes in our company's networking products. This involves coordinating efforts from various departments, such as hardware, software, and manufacturing, to collectively work towards identifying and resolving issues.
Customer Communication: As a pivotal point of contact, you will proactively communicate with our company's customers to relay RMA root cause findings. Your effective communication skills will help build strong customer relationships and instill confidence in our company's commitment to product quality.
Product Improvement Initiatives: You will play a critical role in enhancing the design, manufacturing process, and testing flow of our networking products. Through analysis processes, you will identify areas for improvement and recommend corrective and preventive actions to address quality complaints.
Hands-on Lab Work: Your expertise will extend to conducting extensive lab work, encompassing hardware, firmware, and software components. This will involve debugging and characterizing system-level, board-level, and chip-level issues, ensuring a robust understanding of product performance.
Continuous Learning and Innovation: Staying updated on the latest industry trends and technological advancements will be essential in fostering innovation and driving continuous improvement within our company's failure analysis processes.

Do you want to take part in accelerating the networking solution across our company's product portfolio? our company Co-packaged silicon-photonics group is seeking a dedicated R&D engineer to join our lasers and silicon-photonics validation team. We are seeking a skilled and experienced lasers and electro-optics engineer or physicist to join our team. The ideal candidate will have deep understanding of optics, lasers, and fiber-optic technology, together with expertise in laser testing, characterization, and packaging.
In this role you will participate in laser development for different networking products, including test setup design and test automation, perform tests and characterization of packaged lasers and of optical modules in a system. You will collaborate with cross-functional teams (R&D, verification, architects, FW, electronics, mechanics) internally and externally. This role requires hands-on experience and a deep understanding of optics and laser physics, high-speed testing, excellent Integration, problem-solving skills, and strong communication abilities.
What youll be doing:
Develop, implement and automate testing methodologies and procedures for laser characterization and performance evaluation , including power, wavelength, modulation, and noise measurements.
Document experimental results accurately and clearly present findings.
You will lead the design of verification setups for bringing up and testing the new SiPh transceiver chips.
Develop and implement laser testing methodologies and procedures to perform laser testing and characterization, including modulation and noise measurements.
Provide technical support and assistance to manufacturers of silicon photonics testing platforms.
Troubleshoot and diagnose technical issues related to equipment, processes, and software.
Document experimental procedures, results, and findings accurately and comprehensively.
Collaborate with cross-functional teams, including engineering, product development, and manufacturing, to resolve complex technical issues and implement system upgrades or modifications.

We are seeking an experienced Power Integrity/PreSi reliability Engineer. As part of our team, you will be working with multiple projects across several teams worldwide. Developing tools, flows and methodologies and their deployment in the projects, working on cutting edge technologies in the scope of the power integrity and reliability.
What you'll be doing:
Working on implementing and developing tools and flows covering IR-drop and Electromigration.
Adapting and designing flows and methodologies to custom project needs.
Ensuring robust power integrity and reliability.
Perform power integrity analysis and mitigation.
Collaborate with other design teams on power delivery strategies.

our company Networking is looking for an IC senior Product Engineer (PE) to take ownership of our company Networking IC mass production engineering and data analysis, and to take part of IC Network Production, Reliability, Validation and Characterization group. You will be a part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers. Do you have passion for data analysis, post-Si hand on work and problem solving? We will be happy to have you on our team!
What You'll Be Doing:
Lead multiple networking ICs products engineering activities, which will include making real time decisions on quality of silicon, define pass/fail criteria for screening, solve multi-disciplinary problems and perform cost reduction and quality enhancement, by sophisticated data analysis, AI tools and deep understanding of testing and HW.
Collaborate closely with both vendors (test houses and fab) and internal engineering teams (operations, IC test, reliability, characterization, package assembly and HW).
You will be working with the best engineers in the field! In an exciting, fast-paste and challenging work environment. Learning new things every day and helping improve our company's network products!
We look forward to expanding our team ahead of the phenomenal technological developments coming our way.

We are looking for a Formal Verification Engineer for our company Networking team!
This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking NIC technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our NIC team delivers world class CPU interface and offload solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver the best and most widely used high BW ethernet and IB NICs in the industry. our company has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our company's core technology.
Learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.

we are looking for a forward-thinking Software Architect for an exciting position in the CTO architecture group. The position includes researching new technologies with focus on architecture definition of groundbreaking technologies in networking drivers, virtualization, and Linux kernel and VMware development. He or she should have validated experience in Software architecture and/or development in the field of datacenter networking. Moreover the architect show good overall understanding of system level issues, be familiar with network protocol, operating systems, and virtualization, work closely with customers on requirement collecting and feature definition, and able to technologically lead R&D.
What you'll be doing:
Technically leading the features owns working with customers and R&D on architecture and design of the features.
Clearly define the requirements. research the hardware, firmware, and software existing support and define the solution to match the requirements he defined.
Present and verify the solution defined to the potential customer or relevant community (Linux, DPDK, others) and to internal R&D for implementation.
Resolve issues raised during implementation stages or feedback from community and customers. Specific field of handling of new features include VMware next gen switching logic, emulated netdev and storage blockdev, security DPI and FW offload solutions, and encryptions.

Our Networking System Product Engineering team is looking for an excellent Test Design and Validation Engineer. The position requires an understanding of HW and SW to provide stable, efficient, smoothly running production tests, to enable high availability, while ensuring the quality of the products being shipped to customers. The position combines design and hands-on infrastructure development, implementing and maintenance of sophisticated tools that improves development workflow and overall productivity.
What youll be doing:
Design and develop automated tests for networking Switches and Adapters while working closely with the HW, ASIC, and SW Engineering teams to achieve a reliable test with high coverage
Exposed to various aspects of design, DFT, and test of our company's next-generation network products
Take a significant part in the definition and development of tests from the development level to the final test of Network-Systems
Utilize test suites to find, debug and resolve problems with production process
Ability to drive projects to full execution in time and working under pressure of schedule and multi project environment
Supporting and fix bugs of existing code. Supporting production lines for: deployments, patches, maintenance
Test Verification and Validation (both HW and SW). Troubleshooting and streamlining/optimizing our testing procedures
Execute tests in different scopes such: regression, performance degradation, functional, and security; report the progress of testing and provide summary reports of the activity.

We are seeking a highly motivated SoC Architect to join our team and define the next generation of our companys high-performance networking SoCs. Our Ethernet and NVL switch silicon powers the world's most advanced AI compute clusters - from hyperscale GPU systems used to train and inference massive foundation models, to the AI factories shaping the future of computing.
As an SoC Architect at our company, you will drive end-to-end SoC definition, connecting system-level requirements with chip-level implementation across multiple domains. You will work closely with cross-functional teams to craft scalable, power-efficient, and feature-rich SoCs that enable the next leap in networking and AI infrastructure.
What You'll Be Doing:
Lead SoC architecture across multiple teams and disciplines - including firmware, security, debug, power management, and peripheral/IP owners - ensuring holistic architectural alignment and system coherence.
Ensure next-generation architectures meet the requirements and constraints of all stakeholder teams, and drive clear specification and communication of those requirements.
Architect and analyze multi-chip solutions, including die-to-die connectivity, chip partitioning, package/board constraints, system requirements, chip fabric, PCIe subsystem and how SoC subsystems must support them.
Define top-level SoC structure: subsystem partitioning, interconnect, memory subsystem, coherency, clocking, power architecture, and system integration.
Define system flows: power up sequences, boot sequences, software update.
Own the SoC architecture specification and guide it throughout the entire product lifecycle - concept, modeling, implementation, and silicon bring-up.
Perform trade-off analyses across performance, area, power, and feature complexity to drive architectural decisions.
Collaborate deeply with chip architects, logic design, verification, physical design, firmware, and system software to ensure seamless integration of all SoC components.
Contribute to innovation and long-term architectural direction, including patent development.

we are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Work in a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.
Chip level integrations and connectivity.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.

As a Senior Software Architect in the Accelerated Computing System and Software team, you will define Software Defined Networking (SDN) architectural solutions and be part of a team of specialists who span across numerous technological fields related to the modern data center, such as distributed AI and deep learning systems, High Performance Computing (HPC), Networking Operating Systems, Virtualization, Storage, and more.
What youll be doing:
Define system and software architecture for Software Defined Networking (SDN) of ground breaking emerging AI and HPC networks which involves innovative software and hardware.
Be an active member in setting the use-cases and metrics for Monitoring Complex High-speed Networks Control-plane.
Work closely with various groups within our company to bring AI and HPC network technologies to reality, including GPU and Switch HW and SW teams, Product as well as fellow architects.

our companys Product Engineering group is looking for an experienced Electronics/System engineer to serve as a Technical Project Leader (TPL), join our organization, and be a part of the System Product Engineering organization. The team delivers brand new, high-quality products to our company's customers, applying the following: Development and deployment of automatic testers for our companys network business units (Computing network adapters and High-speed switch systems) including hardware, software, and mechanics; Coordinating and leading all aspects of the analysis of manufacturing data to identify and mitigate quality issues using advanced data analysis techniques such as machine learning, statistical tools, and AI; Leading smooth production and capacity enlargement and failure analysis of return material from customers to understand the reason for failures ;Validating test performance and stability using QA (V&V - validation and verification) methods; The TPL leads projects from requirement until end of life; Engineering manager for SPE projects and technical authority across SPE teams
What youll be doing:
Building integration plans, communicating status and priority among the teams (in/outside of SPE), assessing risks and developing mitigation plans
Leading the project lifecycle in the SPE group, which starts at the requirements stage, through chip design and FW stages till SPE MP, including quality and yields improvement plans
Responsible for bugs management prioritization and tracking and relevant knowledge transfer to the SPE group
Working closely with development teams for environment improvements, such as automation, and driving mitigations to reduce risks
Collaborating with PM for schedule tracking and modifications
Evaluating new technologies and testing capabilities for improvement
Working with the testing architecture team (DFT) to assure testing setups and coverage are met
Engaging with a variety of teams: R&D, HW and SW, Chip design, Operations, thermal, signal integrity, FW and SW, layout, and more, Report project status for high level management.

we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part in flows development.

we are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction
What you'll be doing:
Develop and maintain design automation and methodologies for SoC and networking clock flows.
Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.
Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.
Support SoC integration and construction flow activities across multiple projects.
Assist in timing, power, and noise analysis to ensure efficient performance.

We are now looking for a Senior verification technical lead for our FC Switch Silicon team. As a FullChip verification technical lead Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a FC verification team within the Switch silicon.
Dynamic verification environments planning for units infrastructures and system level
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW
Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.

We are seeking for an expert in SOC Design Integration Engineer with strong design fundamentals, to work in Switch Silicon group. You'll join a group of hardworking engineers to craft and implement the next generation innovative Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a design integration team which responsible for all the switch design integration
Work closely with multiple teams within organizations such as Architecture, u-arch, designers, BackEnd and FW
Work on FullChip Assembly and drive cross-functional teams towards FullChip milestone execution
Be responsible for all the switch chip design architecture focusing on timing, area and power.