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לפני 15 שעות
חברה חסויה
Location: Merkaz
Job Type: Full Time
abra is seeking a Senior FPGA Engineer This role requires close collaboration with multidisciplinary teams, including hardware, software, verification, and system engineers, to deliver high-performance, mission-critical FPGA solutions—from concept and design through development and production, all the way to integration and operational deployment.
Requirements:
* Bachelor’s degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related technical field.
* Minimum of 5 years of professional experience in FPGA design and development.
* Strong proficiency in VHDL and/or Verilog for RTL design.
* Hands-on experience with at least one major FPGA vendor toolchain: Xilinx/AMD (Vivado, Vitis, ISE) or Intel/Altera (Quartus Prime, Platform Designer/Qsys).
This position is open to all candidates.
 
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Job Type: Full Time
Radar Defense Company | Full-Time | On-site
About the Role
We're looking for a Senior FPGA Architect to lead the technical development of high-performance radar systems, built on Altera (Intel FPGA) components operating at terabit-scale processing speeds. The role combines full architectural ownership with hands-on RTL work.

You'll lead architecture definition from the ground up, through RTL implementation, simulation, and verification, to bring-up and full integration with hardware, RF, algorithms, and software - on mission-critical defense radar systems.

What You'll Do
Lead and design complex multi-FPGA architectures based on Altera/Intel FPGA, meeting extremely high processing-rate requirements (terabit-scale)
Write hands-on RTL (VHDL/Verilog) for critical modules while providing technical leadership to the team
Design and implement high-speed interfaces: PCIe, DDR, Ethernet, JESD20
Requirements:
What We're Looking For
10+ years of experience in FPGA development, including significant time in an architectural/technical leadership role
Deep, hands-on experience with Altera (Intel FPGA) components - required
Full proficiency in Quartus Prime and ModelSim
Proven experience designing complex multi-FPGA architectures
Experience with high-speed interfaces at high data rates (400G/800G, PCIe Gen5/6, JESD204B/ C, SerDes)
Experience with Real-Time signal processing and RF /sensor systems
Knowledge of Digital Beamforming - a significant advantage
B.Sc. in Electrical/Electronics or Computer Engineering
Why Join Us
A small, senior, highly professional team, with real technical ownership of the product. Work on cutting-edge technology at the performance frontier, at a company with direct impact on critical defense radar capabilities.
This position is open to all candidates.
 
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לפני 2 שעות
חברה חסויה
Location: Herzliya
Job Type: Full Time
We are seeking a highly skilled Emulation Engineer with extensive experience in the semiconductor industry to join our Chip Design team.

The ideal candidate will have a proven track record working with advanced emulation platforms, particularly Veloce, Palladium or Zebu.

Key Responsibilities:

Develop and maintain emulation models from RTL for complex SoC designs
Port RTL designs into emulation platform
Debug hardware and software issues in pre-silicon environments
Collaborate with frontend design, design verification, validation and software development teams to create comprehensive test strategies
Set up and maintain emulation hardware infrastructure
Develop workflows for efficient emulation processes
Collaborate with emulator vendor field service engineers to resolve hardware issues
Support users and debug issues
Requirements:
Bachelor's or masters degree in electrical engineering, Computer Engineering, or related field
5+ years of experience in emulation engineering within the semiconductor industry
Extensive hands-on experience with Veloce, Palladium, Zebu, or equivalent emulation platforms
Experienced in design or debug of complex SOC, ARM CPU, fabric and AXI and AHB busses, and interfaces (DDR, PCIe, USB etc.)
Strong understanding of RTL design, synthesis, and gate-level implementation
Proficiency in scripting languages such as Perl, Python, and Tcl
Excellent problem-solving and debugging skills for complex hardware/software issues
Familiarity with software debug tools and CPU/SoC architectures
Strong communication skills
This position is open to all candidates.
 
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חברה חסויה
Location: Haifa
Job Type: Full Time
We are looking for an experienced FPGA Firmware Developer to join our advanced R&D team and take part in the development of complex, multidisciplinary systems.
We are looking for someone who is passionate about FPGA development, enjoys solving complex engineering challenges, and is eager to continuously learn and grow in a cutting-edge technology environment.
Responsibilities:
Design, develop, and integrate FPGA-based solutions for advanced embedded systems.
Develop RTL using VHDL, Verilog, or SystemVerilog.
Work with AMD (Xilinx) and Intel (Altera) FPGA development and simulation tools.
Design and implement high-speed digital interfaces, including DDR, PCIe, Ethernet, SERDES, and more.
Develop and integrate SoC-based solutions.
Perform FPGA bring-up, debugging, validation, and system integration.
Collaborate closely with hardware, software, and system engineering teams.
Prepare interface specifications, technical documentation, and APIs.
Requirements:
B.Sc. in Electrical Engineering or a related field.
At least 5 years of hands-on FPGA development experience.
Strong RTL development skills using VHDL, Verilog, or SystemVerilog.
Experience with AMD (Xilinx) and/or Intel (Altera) FPGA toolchains.
Experience with high-speed interfaces (DDR, PCIe, Ethernet, SERDES, etc.).
Experience developing SoC-based systems.
Experience with FPGA bring-up and debugging.
Ability to work independently and in multidisciplinary teams.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
8 years of experience in technical leadership.
Experience in one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
Experience developing RTL for ASIC subsystems.
Preferred qualifications:
Experience working with design networking like: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in TCP, IP, Ethernet, PCIE and DRAM including Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
Experience architecting networking switches, end points, and hardware offloads.
Understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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08/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the QM-Platform team.
This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for control systems.
Responsibilities:
Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.
Requirements:
3+ years of experience in FPGA design and digital system development.
Strong proficiency in Verilog/SystemVerilog RTL design.
Hands-on experience with Xilinx FPGA families (UltraScale+, Zynq, or Versal).
Experience implementing and debugging high-speed interfaces (PCIe, Ethernet, JESD, or similar).
Solid understanding of FPGA development flows, including synthesis, place & route, and timing closure.
Experience with lab debugging tools (e.g., ILA/ChipScope, oscilloscopes, logic analyzers).
Experience with simulation and verification methodologies (RTL and gate-level).
Strong problem-solving skills and attention to detail.
B.Sc. or higher in Electrical Engineering, Computer Engineering, or equivalent.
Strong communication skills and ability to collaborate across teams.
Advantages:
Experience with Versal architecture, including NoC design and integration.
Background in ASIC design or verification.
Familiarity with FPGA backend flows and static timing analysis (STA).
Scripting experience (Python, TCL, Makefile) and/or C/C++ knowledge
This position is open to all candidates.
 
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16/08/2026
Location: Yokne`am
Job Type: Full Time and Hybrid work
​If you are looking to make an impact, come and join a team developing the next generation of space communication technology.

Our mission is to revolutionize the way satellites, space robots and spacecrafts communicate through deep space, in earth orbit and with ground stations. Our technology is based on space proven state-of-the-art proprietary architecture that enables a different approach to the way space communication systems are designed.

We are looking for experienced FPGA Engineers to lead innovation in the next generation space connectivity technology.



What you will be doing​

Design and manufacture systems including ICs by RS and SoC type FPGAs.

Design and implement high-speed digital signal processing algorithms.

Design for highly robust, distributed systems with emphasis on managing physical effects that originate from the harsh space environment.

Implement DSP algorithm on SoC type FPGAs.

Key contributor to Digital, Modem architecture and design.

Lead technical reviews with key stakeholders.

Work closely within a multi-disciplinary team to lead high-impact technical decisions about system design, implementation, and verification.
Requirements:
​Requirements

10+ year of experience in complex FPGA design.

Extensive experience in development over SoC type FPGAs including integrated ARM cores and programable logic.

Extensive experience with signal processing functions and mixed-signal systems.

Excellent knowledge with FPGA design and development in Verilog/VHDL/Vivado/Vitis.

Hands on experience with FPGAs build flow including design, synthesis, place & route, timing constraints and timing closure.

Hands on with debug methodologies and lab debug experience.

B.Sc. in Electrical Engineering or equivalent with emphasis on signal processing.

Highly motivated, team player driven to achieve high quality results.


​Advantages

Experience with development over Xilinx Versal.

Experience with VLSI design tools chain as linters and Clock Domain Crossing.

Experience with beamforming and MIMO systems.

Experience with analog and RF front-end design.

Experience in space system development.

Able to write scripts in MATLAB, python, or other scripting languages.

Problem solver.

Space enthusiast.
This position is open to all candidates.
 
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20/08/2026
חברה חסויה
Location: Haifa
Job Type: Full Time
We are looking for an experienced FPGA Design Engineer who will play a pivotal role in developing , designing and optimizing FPGA solutions for our cutting-edge projects. Your expertise will drive innovation and excellence in digital design as part of the detection team in CT\AMI.

Your role :
Develop FPGA logic using VHDL / Verilog.
Design and implement high-speed data paths and interfaces such as DDR, PCIe, Ethernet.
Perform simulation, verification, timing closure, and debugging.
Integrate FPGA with soft processors (such as MicroBlaze / Nios), sensors, ADCs/DACs, and other system components.
Support system bring-up, lab validation, and debugging at both board and system level.
Collaborate closely with hardware, firmware, software, and system teams.
Support and participate in architecture discussions and design reviews.
Read and understand board schematics to support integration and troubleshooting.
Perform lab and system-level testing after component changes or design updates.
Document FPGA design, interfaces, and implementation details.
Requirements:
You're the right fit if:
Bachelor's degree in Electrical Engineering
6+ years of hands-on FPGA design experience, in a multidisciplinary industry.
Strong experience in digital logic design and debugging.
Strong knowledge of VHDL / Verilog.
Experience with Xilinx tools, especially Vivado.
Knowledge and experience with high-speed serial interfaces (such as: Ethernet, DDR) and protocols like AXI.
Familiarity with high-speed interfaces and memory systems.
Ability to read and understand system schematics.
Experience with lab debugging and validation.
Ability to document design work clearly and support structured release processes.

Advantages
Experience with UVM or other verification methodologies.
Background in imaging systems or signal processing.
Experience in medical devices or other regulated industries.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Emulation Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
8 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
Experience with design debug tools (e.g., Verdi, Verisium).
Experience with coding and scripting in C, C++, Perl, TCL, or Python.

Preferred qualifications:
Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
Experience with associated electronic design automation (EDA) tools, automation, and flow enhancements.
Experience with coding in Verilog/SystemVerilog for design.
Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).
Understanding of register transfer level (RTL) to emulation/field-programmable gate array (FPGA) flows including emulation test benches (e.g., transactors/accelerated verification intellectual properties (VIPs), hybrid, in-circuit emulation).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Design Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHSIC Hardware Description Language (VHDL)), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience architecting networking ASICs from specification to production or equivalent experience.
Experience developing RTL for ASIC subsystems.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience working with design networking: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience architecting networking switches, end points, and hardware offloads.
Experience working with software teams optimizing the hardware/software interface.
Experience in a procedural programming language (e.g., C++, Python, Go).
Knowledge of TCP, IP, Ethernet, PCIE and DRAM.
Familiarity with Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
This position is open to all candidates.
 
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07/09/2026
חברה חסויה
Location: Herzliya
Job Type: Full Time
The WSSI (Windows Silicon System Integration) team is looking for a Senior Silicon Designer to help design complex silicon subsystems that are part of advanced solutions delivered in Windows client products.
This is an opportunity for an excellent silicon engineer to take meaningful technical ownership in a dynamic, agile, and highly collaborative environment. You will work on advanced subsystem design spanning microarchitecture, RTL implementation, integration, and design quality, with close collaboration across architecture, verification, firmware, system engineering, and physical design teams.
The role focuses on complex security-oriented silicon subsystems. We are looking for someone who combines strong design fundamentals with curiosity, ownership, and the motivation to learn and apply modern techniques - including AI-assisted workflows - to improve silicon development productivity and quality.


Responsibilities
Own and drive microarchitecture and RTL design for complex silicon blocks and subsystems, translating architecture and system requirements into clean, efficient, and high-quality hardware implementations.
Collaborate closely with verification, firmware, system engineering, architecture, and physical design partners to define interfaces, debug complex issues, manage technical risks, and deliver robust silicon solutions.
Contribute to subsystem integration, design reviews, quality checks, synthesis readiness, timing considerations, and design handoff flows.
Explore and apply modern silicon development workflows, including AI-assisted techniques for design productivity, debug, documentation, and quality improvements.
Act as a technical leader within the team by mentoring others, raising the engineering bar, and helping drive execution in a fast-moving environment.
Requirements:
Qualifications:
B.Sc. or higher in Electrical Engineering, Computer Engineering, or a related technical field.
Proven experience and technical excellence in RTL design for complex IPs, subsystems, or SoCs.
Proven hands-on experience with Verilog/SystemVerilog, microarchitecture definition, RTL implementation, design reviews, and design quality practices.

Preferred Qualifications:
Experience applying AI-assisted techniques to improve silicon design productivity, debug, documentation, automation, or workflow efficiency.
Experience with security-oriented silicon subsystems, including crypto engines, memory protection, secure boot, trusted execution, or related hardware security domains.
Experience working across key parts of the silicon development lifecycle, including verification collaboration, integration, synthesis readiness, timing considerations, and design closure.
Experience with low-power design, performance optimization, clock/reset architecture, CDC/RDC, lint, synthesis, or timing closure.
Experience acting as a technical leader, design owner, or mentor for other engineers.
Strong problem-solving skills, ownership mindset, and ability to drive technical work independently while collaborating effectively across disciplines.
High motivation, curiosity, and willingness to learn new domains, tools, and methodologies.
This position is open to all candidates.
 
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