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Required PHY Post Silicon Validation Engineer
Job Description
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development.
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With
You'll be part of our Group driving our game changing next generation network devices - Silicon One. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
Silicon One is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

We are seeking talented, creative and disciplined engineers to join the best-in-class team that plays a significant part in the development of new silicon for our eco-systems by engaging in a dynamic, highly collaborative environment. As a Wireless MAC System Architect, you will be a core member of our highly innovative and visible Wireless System-on-Chip (SoC) design team that defines modem architectures, develops MAC-layer algorithms, and invents embedded DSP algorithms for chips enabling exciting new wireless applications. You will be responsible for developing state-of-the-art wireless SoC products that are enjoyed by millions of our customers. Application areas include ultra-wideband sensing and specialized wireless audio; products enabled or improved by our teams SoCs include specialized audio headsets (such as AirPods), watches and iPhones.

In this role you will be responsible for the architecture of the Connectivity IP with focus on the MAC sub-system: - Define, document and Spec Connectivity MAC architecture and performance requirements.
- Analyze & simulate the performance of the Connectivity IP in real-life use-cases, achieving benchmarking performances in several metrics, including Throughput, Robustness, Co-existence with other Wireless IPs and more.
- Working closely with other architects (PHY, Power Management, FW and SW) to introduce best in class Connectivity IP solution.
- Develop innovative system architectures and protocols to deliver best-in-class performance for the MAC subsystem of custom wireless silicon solutions.
- Introduce cross-domain features where opportunities exist for innovation to achieve enhanced performance.
- Produce MAC architecture, specifications and corresponding performance/reference modeling in support of digital HW and FW design and verification efforts.
- Develop and maintain a MAC systems infrastructure applying the best methodologies for system-level simulation, pre-silicon prototyping (including emulation and FPGA prototyping), FW QA, regression and MTBF testing, and system verification to ensure first-time design success.
- Support the delivery of new wireless technologies to the Product Systems teams.

Required PHY System
Job Description
Join the PHY system team at Silicon One, a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices-Silicon One-within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

We are seeking a CAD LEQ (Logical Equivalence Checking) Engineer to develop, deploy, and support equivalence checking methodologies across complex SoC programs. This role focuses on ensuring functional correctness between RTL, synthesized netlists, and post-implementation designs, while driving scalable, robust sign-off flows.

Responsibilities
Own and maintain LEQ sign-off methodology across RTL-to-GDS flows.
Develop and support flows using tools such as Cadence Conformal and equivalent industry solutions.
Drive power-aware equivalence checking including CPX flows.
Enable ECO flows, ensuring safe and correct implementation of late-stage design changes.
Debug equivalence failures and perform root-cause analysis across RTL, synthesis, and PnR stages.
Collaborate with design, synthesis, PD, and power teams to resolve mismatches and improve convergence.
Optimize runtime, capacity, and scalability of LEQ flows for large SoCs.
Define best practices, guidelines, and automation for LEQ usage across projects.
Partner with EDA vendors to resolve tool issues and drive feature improvements.

We are looking for an experienced Architect to own and evolve the architecture of our companys cloud-based products. The role requires strong hands-on expertise in AWS-based SaaS platforms, the ability to design highly scalable and secure multi-tenant systems, and leadership to guide engineering and DevOps teams in building reliable cloud solutions while driving innovation through AI capabilities.
Key Responsibilities:
Cloud Architecture & Ownership:
Own the end-to-end architecture for all company cloud products
Design, plan, and implement cloud architectures aligned with business and technical requirements
Define cloud topologies addressing uptime, stability, redundancy, scalability, capacity planning, security, performance tuning, and observability
Ensure architecture supports multi-tenant SaaS environments
Design, Innovation & Roadmap:
Drive technology and cloud architecture roadmaps
Bring innovative ideas and propose modern cloud-native solutions
Continuously evaluate new cloud services and technologies to improve platform reliability and efficiency
Implementation & DevOps Collaboration:
Work closely with DevOps teams to ensure correct implementation, deployment, and operational excellence
Guide best practices for CI/CD, automation, monitoring, and incident response
Support R&D teams on cloud-related design and implementation topics
Reliability, Security & Optimization:
Architect solutions focused on high availability, disaster recovery, and fault tolerance
Define security architecture, access control, data protection, and compliance standards
Drive cloud optimization for cost, performance, and scalability
Leadership & Execution:
Lead, mentor, and influence engineering teams on cloud architecture best practices
Effectively multitask and context-switch across multiple initiatives and teams
Deliver high-quality outcomes under tight deadlines and pressure
Collaborate across teams with a strong sense of ownership and accountability

Join a highly skilled engineering team building core storage infrastructure across multiple system layers. You'll develop and enhance frameworks that handle disk image operations, provide unified storage abstractions, and enable cutting-edge virtualization technologies. This role requires both breadth and depth, comfortable working from kernel-level drivers to user-space frameworks, debugging complex multi-layered systems, and collaborating across hardware, kernel, and application teams. You'll participate in all phases of development: architecture, implementation, optimization, testing, and integration with deeply integrated platform features.

Responsibilities:
Develop kernel-level storage components and user-space frameworks for macOS and our other platforms.
Optimize I/O performance, resource utilization, and power efficiency across the storage stack.
Debug and resolve complex issues spanning hardware, firmware, kernel, and user-space boundaries.
Collaborate with cross-functional teams, including hardware, kernel, filesystem, and virtualization engineers.
Write comprehensive test suites, performance benchmarks, and technical documentation.
Contribute to architecture decisions and long-term technical direction for storage systems.

Required Senior Electrical Post Silicon Validation- Silicon One
Job Description
Meet the Team
We are a dynamic group of engineers dedicated to pushing the boundaries of technology. Our mission is to validate and drive the performance of Silicon One products, ensuring they meet the highest standards of quality and reliability.
Operating at the forefront of technology, we work with latest, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, applying our expertise to impact the future of networking technology. With a commitment to excellence and a passion transformative technology, we are shaping the future of high-performance Networking and delivering unparalleled value in every project we undertake. Join us, and be a part of a team where professionalism meets impact!
Your Impact
Drive the resolution of complex silicon performance and characterization issues through deep, multi-functional collaboration with architecture, design, and software teams. Leverage these technical insights to provide critical feedback that directly influences the design, debuggability, and architectural specifications of future silicon components
Key Responsibilities:
Lead the Electrical Post Silicon Validation efforts for Silicon One products, focusing on high-speed and power-intensive devices. Collaborate with multi-functional teams to drive the silicon validation process, from architecture through to physical design and DFT. Analyze and interpret characterization data to guide design improvements and ensure product excellence. Develop and execute test plans to validate silicon performance and reliability against stringent specifications. Troubleshoot and resolve issues related to silicon performance and characterization.
Why Join Us:
Be part of team at the forefront of silicon technology, working on the most advanced products in the market. Work closely with some of the best engineers in the industry, driving innovation and excellence in silicon characterization. We are a fast growing team that values talent and provides ample opportunities for professional development and career advancement.

A hands-on engineering role focused on building production-grade AI/ML systems and the automation infrastructure that supports them - driving AI adoption into developer workflows, internal tooling, and domain-specific applications across the organization.

As a member of the AI Infrastructure & Applications team, you will lead the design, development, and production deployment of AI/ML-powered systems alongside the automation infrastructure and developer platforms that support them.
You will architect intelligent, scalable solutions used across the organization - driving AI adoption into developer and automation workflows, internal tooling, and domain-specific applications - while also building and maintaining the automation frameworks and infrastructure those systems depend on.
The systems you build are expected to be production-grade, reliable, observable, and continuously improving.

Responsibilities
Architect and ship end-to-end AI-powered applications and pipelines, from prototype to production.
Build agentic systems, RAG pipelines, and tool-use patterns that integrate LLMs into real workflows.
Define and own AI quality metrics (accuracy, groundedness, hallucination rate, task completion) and integrate them into CI/CD release gates.
Design evaluation frameworks for non-deterministic systems: offline evals, human-in-the-loop review, and automated regression suites.
Harness AI/LLMs to extend and enhance existing automation infrastructure, improving system performance and operational efficiency.
Build scalable automation frameworks, APIs, and tooling used across the organization.
Collaborate with engineering, CI, and domain teams to address automation needs across hardware, software, and cloud.
Distill requirements from a large, diverse user base into generic, reusable, maintainable solutions.
Implement monitoring, drift detection, and structured feedback pipelines for continuous improvement.
Apply rigorous engineering discipline - test design, release criteria, rollback strategies - to AI-native deployments.
Partner with product, design, and domain experts to define use cases, acceptance criteria, and rollout plans.

As a Wireless Firmware Architect you will focus on defining technical direction, conducting research and analysis, and providing architectural guidance for our Bluetooth embedded solutions.

The position emphasizes wireless protocol design and simulations, software architecture definition, technical planning, proof-of-concept development and performance optimizations.

Responsibilities:
Define comprehensive software architecture for our Bluetooth embedded solutions.
Establish firmware architectural guidelines and principles.
Support development teams with architectural guidance and consultation.
Integrate performance and power analysis requirements into architectural frameworks.
Create technical demonstrations to support architectural decision-making.
Monitor and analyze hardware implementations to ensure alignment with software architectural requirements.
Evaluate hardware design decisions and their impact on firmware architecture.
Collaborate with hardware teams to provide architectural input and recommendations.
Design and develop proof of concept (PoC) projects to validate architectural approaches.
Research and prototype emerging wireless technologies and methodologies.
Evaluate feasibility of new technologies and integration approaches.
Design and develop wireless protocol simulation frameworks, develop intelligent simulation environments for protocol validation and optimization.
Analyze new standards and specifications for architectural implications.
Track industry trends and emerging wireless technologies.

This role is responsible for leading manufacturing engineering and production planning activities, ensuring production continuity, accurate planning, and efficient execution across the organization.

Key Responsibilities:

Manufacturing Engineering:
Manage BOMs, ECOs, and product configurations
Lead NPI and transfer from R D to production
Define testing procedures and support product validation
Ensure compliance with standards and certifications
Support process improvements and root cause analysis

Production Planning and Resource Management:
Build and manage production plans based on forecasts and orders
Coordinate with Procurement, Manufacturing, Warehouse, and Sales
Monitor inventory, material readiness, and production continuity
Maintain accurate data in the Priority ERP system

We are seeking a Physical Design Technical Leader.
Meet the Team
Physical Design team within Silicon One is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Your Impact
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

Required PHY Firmware Technical Leader
Meet the Team
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices

Silicon One is seeking a CAD Engineer to join the Silicon One Physical Design team.
Meet the Team:
You'll be part of the Silicon One team, which is at the heart of our software and ASIC design efforts.
As part of our team, youll contribute to the development of our next-generation network devices-Silicon One. Our team operates in a startup-like environment within a stable and leading corporation.
Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof.
We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of our future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility.
Silicon One is a ground-breaking, groundbreaking technology that will serve our customers and end users for decades to come. The Internet now has a new, faster, better, and safer engine!
Your Impact:
You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

Required Logic Design Engineer
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.

A fast-growing global medical device company, developing and manufacturing innovative drug delivery and infusion solutions across the continuum of care- from the hospital to the home. We are looking for an excellent Research Engineer to join the R & D team.
Job Description:
Lead novel research in state-of-the-art technologies - bypass technological borders
Lead departmental tasks that include problem solving and critical/root cause analysis
Algorithms development for various system components
Design and implementation of experiments for various projects
Manage mutual research projects done and universities around the world
Direct Manager: Research director.