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Our RADAR VLSI Team is looking for an Embedded SW Engineer for SystemC Modeling that include Performance and Program view Modeling. You will be part of VLSI emulation team , working on current and next-generation designs for next generation sensors.
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to our needs.
You will work closely with HW architects and SW/Algorithms developers.

Required System Level Test Technical Project Manager
We are the Production Test team - responsible for the definition, development, and deployment of production test operations for the worlds most advanced SoCs for ADAS and self-driving vehicles.
This is your opportunity to join a team during its initial forming stages and leave your mark, as we assume full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
What will your job look like:
Lead the planning, execution, and tracking of System Level Test (SLT) projects across R&D, validation, and production teams.
Work closely with internal design, system, software and hardware teams to define SLT strategy for our SoC products.
Coordinate the development of automated test systems and infrastructure, including test plans, hardware test fixtures, and software tools.
Lead the hardware/software bring-up, enabling and productization activities.
Drive test hardware and software deployment with OSAT vendors to enable large-scale SLT execution and operations.
Enable SLT data collection and analysis and manage production yield excursions.
Drive test time reduction, efficiency improvement, and cost reduction initiatives.
Support RMA analysis with SLT data, SLT-System correlations, and test content enhancements.

Join us and become part of the already elite team, working on new disruptive technologies. Youll have the opportunity to work with technologies that power the worlds largest cloud provider, within a dynamic, open, and fast-paced environment.
We offer a growing dynamic, open, teamwork environment operating at high pace mode. You will be developing challenging software infrastructure and services using our cloud computing technologies and AI .
We are looking for you, a highly skilled engineer who is a team player, eager to learn and innovate.

Key job responsibilities:
Linux Expertise:
1. Minimum 4 years experience with Linux systems, Redhat family is an advantage..
2. Professional-level coding and critping in Python, Bash, csh,tcl, java.
3. Extensive experience building and maintaining CI/CD pipelines, preferably using Jenkins
4. Advanced knowledge of Git
5. Experience with multi-repository management tools such as Gerrit, GitLab, Repo.
5. Strong experience with Ansible automation.
6. Demonstrated expertise in our cloud infrastructure and services.
7. Experience with cloud-native architectures and solutions.
8. Proficiency with modern monitoring solutions including OpenSearch, Zabbix, Grafana, Prometheus, and Loki.
9. Strong fundamentals in networking, including: TCP/IP, secure data transfer, network troubleshooting capabilities.
10. Containers - Practical experience with Docker containerization, Familiarity with Kubernetes, particularly our EKS.

A day in the life:
Proven ability to lead projects in a multi discipline environment , big CI environment, HPC and EDA flows.
Independent, self-starter and team player.
Ability to effectively communicate (verbal and written correspondence in English) in a professional and courteous manner.
Robust troubleshooting and strong analytical skills with demonstrated problem solving ability required.
Technical aptitude. Written and oral communications skills.
Project management and the ability to deal effectively with people at all levels (technical and business audiences) and in different situations. This includes the ability to develop clear, concise documentation.

Our Platform SW department is looking for a highly driven and dynamic SW execution manager to join our team and help shape the future of Autonomous Driving systems.
What will your Job look like?
Work closely with several platform SW development groups. Set and track SW quality and project management standards and procedures, oversight and governance, resource management, communication, and reporting.
Lead quality (ASPICE) processes, define and deploy tools to help track the execution and reflect the status.
Ensure development and testing is according to requirements.
Coordinate the execution of the group deliverables within the schedule and quality delivery.
The role is extremely interesting and involves a tight interaction with our platform SW group leaders and project managers.
The ideal candidate must be able to understand the department's needs and requirements, help in defining the department's portfolio road map, and reflect the progress.

Required Senior IC Test Engineer
We are the Production Test team - responsible for the definition, development, and deployment of production test operations for the worlds most advanced SoCs for ADAS and self-driving vehicles.
This is your opportunity to join a team during its initial forming stage and leave your mark as we assume full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
What will your job look like:
Work closely with the design teams from early stages of the design process to review DFX architecture and define test requirements.
Define test methodologies and generate test content for high-speed interfaces of embedded IP blocks (LPDDR4/5, PCIe Gen4/5, D/C/MPHY).
Test program coding, pattern conversion and pre-Si validation (virtual test simulations).
Support Load Board and Probe Card design activities.
Lead post-Si test program debug activities to enable delivery of samples to internal and external customers.
Test program characterization and tuning to enhance test program quality to meet automotive standards.
Support Quality & Reliability team to enable effective and timely qual plan execution.
Lead test deployment activities with tier-one Foundry and OSAT vendors to enable large-scale Wafer-Sort and Final-Test operations.

Our RADAR VLSI TEAM is looking for an Embedded SW Engineer for SystemC Modeling that include Performance and Program view Modeling. You will be part of VLSI emulation team, working on current and next-generation designs for next generation sensors.
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to our needs.
You will work closely with HW architects and SW/Algorithms developers.

Our Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles.
Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5, PCIe Gen4/5, and CDPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a relatively small team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions, and automation, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.

Required Production Configuration Manager
The Quality team is responsible to foster quality and excellence in our products and processes across the entire company. MEQ team focuses on ensuring high customers' satisfaction through continuous improvement and implementation of automotive standards and best-practices such as ASPICE, IATF16949, ISO 9001, VDA/AIAG Core Tools and ISO26262, both internal and across the entire supply chain, In order to support MEQ objectives, The QMS & Production Quality team is looking for a Production Configuration Manager.
What will your job look like:
Define and implement cross company configuration and change management process, incl: KPIs, Inputs, Outputs, Control points, Reports (from scratch)
Work closely with colleagues from other departments (PMs, development engineers, production engineers, management) and other organizations (suppliers and customers) to realize relevant activities
Define work items/products release process.
Manage and verify retention, back-up and recovery of company products/projects work items.
Create, manage and update PPAP folders for company products
Identify opportunities for improvement and execute them.
Create relevant work items templates and coach the team how to use them.
CCB team - Lead/participate.
Support configuration & change related issues with customers, suppliers and 3rd party organizations.

Required Power Integrity \ Signal Integrity Engineer
You will join a team of talented and experienced Signal/Power Integrity (SI/PI) & Electrical Validation engineers with wide scope of responsibility, from Pre-Silicon SI/PI simulations to Post-Silicon Electrical validation and debugging, covering all High-Speed interfaces and Power Delivery of our EyeQ ASIC products.
What will your job look like:
You will deal with design, simulations, optimization and debugging of high-speed interfaces - like LPDDR4/5, PCIe Gen4/5, C/DPHY, Multi Giga-Bit Ethernet, High-Speed interfaces over Power Cables, Power Delivery Networks.
You will develop Layout guidelines, review the physical design process and check its quality.
You will deal with state-of-the-art signal & power integrity simulation tools and methodologies, advanced results analysis, optimization/verification of the company and customers' PCB designs, etc.
This is a dynamic work environment that requires interfacing with Silicon & Hardware design engineers, IP providers, Electrical and System Validation teams, Customer Application Engineers, EDA tools vendors, and product managers.
The proximity to Electrical Validation activities - we are a single SI/EV team - is another strong advantage, enabling joint simulation-measurements efforts.

Were looking for a Physical Design STA Technical Expert to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Leading FC timing activities & methodologies for brand New SoC, from definition to TO.
Writing design constraints (SDC) for FC/IP/Block levels for all modes.
Involved in chip architecture definition for functional & DFT domains.
Working in close collaboration with the front-end & architecture team.
Working with engineers to identify and overcome roadblocks and obstacles.
Defining AC timing from spec to implementation.
Supporting complex clock structures.

We are seeking for System Validation Engineer to help define, shape, and integrate solutions for the next generation of our cloud platforms.

Take part in the development of products within disruptive system architecture. Youll have the opportunity to work on the technologies that power the worlds largest Cloud provider, within a dynamic, open, and fast-paced environment. Our Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world.

Key job responsibilities:
- Design, implement and execute test plans and test cases.
- Develop and maintain automated test frameworks.
- Identify, document, and track software and system defects.
- Continuously review and improve quality assurance processes.
- Collaborate with development teams to ensure product quality.
- Hands-on debugging at lab.

Were looking for a Physical Design Expert to join the growing Physical Design Team, responsible for developing our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.