לוח משרות דרושים מהנדס חשמל משרה מלאה

Were looking for a System Engineer to join our multidisciplinary R&D team and help define the system architecture, integration, and design of innovative medical devices in oncology.

In this role, you will:
Lead system design and requirements definition for complex hardware-software systems.
Collaborate with cross-functional teams, including product, engineering, QA, and regulatory.
Analyze design alternatives, manage system-level integration, and support V&V processes.
Ensure compliance with medical device standards and contribute to technical decision-making.

We are looking for a highly skilled ATE Developer to join our R&D Automation Test Equipment & Data analysis team. This role is focused on designing, developing, and maintaining advanced end-to-end automation testing solutions to our product (API, HW, OS, system).
The ideal candidate is a hands-on developer with strong expertise in Python, experienced in building and executing automated tests, comfortable working with modern CI/CD pipelines and automation tools ensuring best practices are followed and test automation is seamlessly embedded into the development lifecycle. Knowledge of RF systems is a strong plus.

Key Responsibilities:
Design, implement, and maintain automation frameworks & HW automation production testers using Python.
Develop and execute HW & system-level and end-to-end automation, including API and UI layers.
Building Automation infrastructure for real time data collections and analysis.
Building UI tools for real time data analysis presentation.
Contribute to and optimize CI/CD pipelines (Jenkins, Docker, Git) for reliable and scalable test automation.
Working closely with SW developers, RF, and DevOps engineers.
Perform code reviews, provide technical guidance, and ensure automation code meets high quality and maintainability standards.
Analyse test results, identify root causes of failures, and drive timely resolution in partnership with development teams.
Continuously evaluate and introduce new tools, libraries, and practices to improve automation efficiency.

We are a successful, fast-growing, startup located in Raanana. We are looking for an experienced system engineer to participate and lead the development of a radio-based drone detection and mitigation system as part of the company products.

Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication protocols.
Define requirements and guide multi-disciplinary teams (SW, Algorithms, DSP, and FPGA) through implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like MATLAB, Python, Excel, and other log analysis software.
Create and maintain comprehensive system-level documentation.
Gain a deep understanding of the full system to guide and support testing and validation teams, helping define methodologies, tools, and coverage strategies.

We are looking for a highly skilled Senior Developer Integration Automation to join our R&D Integration Automation team. This role is focused on designing, developing, and maintaining advanced automation solutions across unit, integration, system, and end-to-end testing levels.
The ideal candidate is a hands-on developer with strong expertise in Python and Pytest, experienced in building and executing automated tests, and comfortable working with modern CI/CD pipelines and automation tools. The Senior Developer will act as a technical mentor and key contributor, ensuring best practices are followed and test automation is seamlessly embedded into the development lifecycle. Knowledge of RF systems is a strong plus.

Key Responsibilities:
Design, implement, and maintain automation frameworks and test scripts using Python and Pytest.
Write unit tests, integration tests, and regression suites to ensure comprehensive test coverage.
Develop and execute system-level and end-to-end automation, including API and UI layers (Selenium preferred).
Contribute to and optimize CI/CD pipelines (Jenkins, Docker, Git) for reliable and scalable test automation.
Collaborate closely with SW developers, RF, QA, and DevOps engineers to embed automated testing into every phase of the product lifecycle.
Perform code reviews, provide technical guidance, and ensure automation code meets high quality and maintainability standards.
Analyze test results, identify root causes of failures, and drive timely resolution in partnership with development teams.
Continuously evaluate and introduce new tools, libraries, and practices to improve automation efficiency.
Support integration activities and ensure smooth interaction between hardware, software, and automation systems.

We are looking for a talented communication PHY algorithms engineer to join our growing, highly motivated, and skilled modem research team, to lead and participate in research of proprietary wireless communication signals and design modulators,
demodulators as part of our counter-drone cyber-based product.

Responsibilities:
Research and analysis of proprietary air interface: algorithm research of sampled wireless signals using MATLAB or Python, to define all radio characteristics including sample rate, modulation scheme, error corrections, spreading techniques and more.
Full modem implementation and simulation in MATLAB or Python.
Guide and support the FW, DSP and FPGA teams for concept implementation and debug.
Analysis and debug of PHY algorithms behavior and performance improvements.

DRS RADA is a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance. We are looking for ATE software engineer. As a Software Automatic TEST Equipment Engineer, you will play a vital role in developing and maintaining advanced Automatic TEST Equipment (ATE) software for electronic cards and calibration systems used in our cutting-edge Active Electronically Scanned Array (AESA) radar technology. You will collaborate closely with a multidisciplinary team to ensure the functionality, accuracy, and performance of our ATE systems Key Responsibilities:
* ATE Software Development: Design, develop, TEST, and maintain software for Automatic TEST Equipment used in electronic card testing and AESA radar calibration.
* Integration: Collaborate with hardware engineers to integrate ATE software with testing equipment and devices, ensuring seamless operation.
* Debugging and Troubleshooting: Identify and resolve software issues, system failures, and compatibility problems to ensure optimal ATE performance.
* Documentation: Maintain accurate and up-to-date documentation.
*  Quality Assurance : Implement quality control measures to ensure that ATE software meets industry standards and complies with project requirements.
* Team Collaboration: Work closely with cross-functional teams, including hardware engineers, software developers, and project managers, to meet project milestones and objectives.
* Continuous Improvement: Stay up-to-date with industry trends and emerging technologies, and contribute to the ongoing improvement of ATE software and testing methodologies..

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.
You will also be responsible for performance analysis for a networking stack.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customes, Cloud customers and the billions of people who use our companyservices around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead an ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define high-performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Implement designs in SystemVerilog.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior Design Verification Engineer, you will work as a part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
In this role, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Resolve difficult to verify properties, and contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Workload Analysis Researcher within our company Cloud's MSCA organization, you will be integral to developing silicon solutions powering our company's direct-to-consumer products. You will join a Research and Development team focused on analyzing and profiling workloads requirements within the company Cloud environment. Your role will involve conducting in-depth research on CPU optimization, feature development, and ML usages over compute platforms, contributing to identifying key areas of investment and future opportunities. This role offers a unique opportunity to perform groundbreaking research with a significant impact on both research methodologies and industry products, within the server chip architecture team. Your work will directly influence the next generation of hardware experiences for millions of our company users and Cloud customers.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are company , Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan and execute detailed analysis of CPU workloads within the company Cloud infrastructure, analyze trends and map future requirements.
Collaborate closely with architecture and modeling owners to understand design specifications and identify critical scenarios related to CPU performance and efficiency.
Develop and implement custom workload generation tools and methodologies to simulate real-world usage patterns on our company Cloud platforms.
Analyze the impact of machine learning applications on CPU usage, identifying opportunities for optimization and feature enhancements.
Lead the investigation and development of metrics to measure CPU performance and efficiency, presenting findings to stakeholders and contributing to strategic decisions.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest our company possible.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers , Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Design, develop, test, deploy, maintain, and improve SOC software modeling and other software tools.
Manage individual project priorities, deadlines, and deliverables.
Collaborate with hardware and software architecture teams, SOC performance modeling team, and other company software teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define and implement solutions for design, integration and verification problems using in-house and external technical solutions or tools. Ensure chip quality by implementing best practices and implementing quality control measures.
Participate in project development and convergence with the highest quality, and manage issues as they arise through design and implementation.
Connect between RTL design, physical design, Design for Test (DFT), external IPs and SoC while maintaining project priorities.
Maintain project infrastructure and stability.