We are looking for a RFIC Engineer.
Design and simulate critical RF/Analog building blocks such as LNA, PA, Mixer, VCO, and PLL.
Contribute to system-level analysis and architecture discussions, ensuring circuit-level designs meet overall performance and integration goals.
Participate in defining block and system-level specifications and allocate budgets across the RF signal chain.
Support layout floorplanning and physical verification to ensure optimal performance.
Support lab measurements and silicon debugging to validate and optimize designs.
Requirements: BSc (or higher) in Electrical Engineering.
At least 4 years of hands-on experience.
Advanced knowledge and hands-on experience in CMOS RF and analog design, including at least one of the following: LNA, PA, Mixer, RF amplifiers, VCO.
In-depth understanding of RFIC/analog design methodologies and flows.
Proven ability to design and simulate at the transistor level and take blocks from concept to silicon.
Proficiency in Cadence Virtuoso and SpectreRF. Experience with EM simulation tools.
Familiarity with the full design flow, including layout, parasitic extraction, and physical verification.
Practical lab experience with RF measurement equipment, silicon validation, and debugging.
Technical Background:
Solid understanding of RF signal chains, performance bottlenecks and trade-offs.
Experience in interpreting system-level specifications and allocating performance margins across the RF signal chain.
Proficient in Cadence Virtuoso and complementary EDA tools.
Experience with electromagnetic simulation tools.
Strong analytical thinking, problem-solving mindset, and effective communication skills.
Working Style:
Proven ability to collaborate effectively across multidisciplinary teams.
Self-motivated and capable of independently driving projects to completion.
Comfortable working in fast-paced environments and adapting to new challenges.
Strong analytical skills with attention to detail.
This position is open to all candidates.