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Our Autonomous Driving Software Group in Haifa is looking for a Teach Lead to join our Team.
Our group is responsible for writing new code to replace the existing code with a new design.
We develop the software architecture system and tools to enable support for many new design wins and scale the company project to run efficiently in vehicles contributing to saving lives and enabling autonomous vehicles.
What will your job look like?
You will be part of the design of the car application that controls the main execution flow of various software components running on the chip. Additionally, it manages many sensors and their inputs, such as cameras, radar, and car signals.
The application integrates these inputs and feeds them into various algorithms to create a comprehensive worldview for the car.
The project is challenging both in its real-time complexity of a system with multiple sensors and being part of the overall automotive car system architecture.
Provide guidance and mentorship to software development teams.
Defining work process tools and technologies to enforce our customers' requirements.
Working in a large group of software developers with cross-team collaboration.

Our K2Core SW team is looking for a Lead System Test Engineer to define and execute the system validation strategy for the Nitro K2 card. In this technical leadership role, you will own the system-level test definition, drive cross-functional validation efforts, and ensure the end-to-end quality of our Nitro K2 card components deployed across our data centers.

This is a hands-on technical leadership role that requires expertise in embedded systems, hardware/software integration, and test automation at scale. You will work closely with HW, firmware, software, testing and platform teams across us to ensure test coverage, platform integration reliability, and production readiness.

Key job responsibilities:
Define and execute the system-level test and validation strategy for the Nitro K2 card across hardware, firmware, software and platform layers.
Lead the design and development of automated test frameworks to support scalable validation and continuous integration.
Collaborate with hardware, firmware, software, and platform teams to define validation coverage, interfaces, and testability hooks.
Own root cause analysis and debug strategy for complex, cross-subsystem integration issues originating from the production fleet.
Lead and execute hands-on system testing, and participate in the release decision process for production deployment.
Mentor and guide automation engineers, promoting a culture of system-level testing and continuous quality improvement.

Our RADAR VLSI Team is looking for an Embedded SW Engineer for SystemC Modeling that include Performance and Program view Modeling. You will be part of VLSI emulation team , working on current and next-generation designs for next generation sensors.
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to our needs.
You will work closely with HW architects and SW/Algorithms developers.

Required System Level Test Technical Project Manager
We are the Production Test team - responsible for the definition, development, and deployment of production test operations for the worlds most advanced SoCs for ADAS and self-driving vehicles.
This is your opportunity to join a team during its initial forming stages and leave your mark, as we assume full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
What will your job look like:
Lead the planning, execution, and tracking of System Level Test (SLT) projects across R&D, validation, and production teams.
Work closely with internal design, system, software and hardware teams to define SLT strategy for our SoC products.
Coordinate the development of automated test systems and infrastructure, including test plans, hardware test fixtures, and software tools.
Lead the hardware/software bring-up, enabling and productization activities.
Drive test hardware and software deployment with OSAT vendors to enable large-scale SLT execution and operations.
Enable SLT data collection and analysis and manage production yield excursions.
Drive test time reduction, efficiency improvement, and cost reduction initiatives.
Support RMA analysis with SLT data, SLT-System correlations, and test content enhancements.

Join us and become part of the already elite team, working on new disruptive technologies. Youll have the opportunity to work with technologies that power the worlds largest cloud provider, within a dynamic, open, and fast-paced environment.
We offer a growing dynamic, open, teamwork environment operating at high pace mode. You will be developing challenging software infrastructure and services using our cloud computing technologies and AI .
We are looking for you, a highly skilled engineer who is a team player, eager to learn and innovate.

Key job responsibilities:
Linux Expertise:
1. Minimum 4 years experience with Linux systems, Redhat family is an advantage..
2. Professional-level coding and critping in Python, Bash, csh,tcl, java.
3. Extensive experience building and maintaining CI/CD pipelines, preferably using Jenkins
4. Advanced knowledge of Git
5. Experience with multi-repository management tools such as Gerrit, GitLab, Repo.
5. Strong experience with Ansible automation.
6. Demonstrated expertise in our cloud infrastructure and services.
7. Experience with cloud-native architectures and solutions.
8. Proficiency with modern monitoring solutions including OpenSearch, Zabbix, Grafana, Prometheus, and Loki.
9. Strong fundamentals in networking, including: TCP/IP, secure data transfer, network troubleshooting capabilities.
10. Containers - Practical experience with Docker containerization, Familiarity with Kubernetes, particularly our EKS.

A day in the life:
Proven ability to lead projects in a multi discipline environment , big CI environment, HPC and EDA flows.
Independent, self-starter and team player.
Ability to effectively communicate (verbal and written correspondence in English) in a professional and courteous manner.
Robust troubleshooting and strong analytical skills with demonstrated problem solving ability required.
Technical aptitude. Written and oral communications skills.
Project management and the ability to deal effectively with people at all levels (technical and business audiences) and in different situations. This includes the ability to develop clear, concise documentation.

Our Platform SW department is looking for a highly driven and dynamic SW execution manager to join our team and help shape the future of Autonomous Driving systems.
What will your Job look like?
Work closely with several platform SW development groups. Set and track SW quality and project management standards and procedures, oversight and governance, resource management, communication, and reporting.
Lead quality (ASPICE) processes, define and deploy tools to help track the execution and reflect the status.
Ensure development and testing is according to requirements.
Coordinate the execution of the group deliverables within the schedule and quality delivery.
The role is extremely interesting and involves a tight interaction with our platform SW group leaders and project managers.
The ideal candidate must be able to understand the department's needs and requirements, help in defining the department's portfolio road map, and reflect the progress.

Our RADAR VLSI TEAM is looking for an Embedded SW Engineer for SystemC Modeling that include Performance and Program view Modeling. You will be part of VLSI emulation team, working on current and next-generation designs for next generation sensors.
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to our needs.
You will work closely with HW architects and SW/Algorithms developers.

Our Autonomous Driving group in Haifa is looking for an Electrical Validation & Embedded SW Engineer. This is an exciting opportunity to join a growing team of highly talented engineers, working on the worlds most advanced SoCs for ADAS and self-driving vehicles.
Electrical Validation engineers enable, debug, and validate high-speed interfaces - like LPDDR4/5, PCIe Gen4/5, and CDPHY - using high-end Lab measurement equipment and advanced SW tools. This dynamic work environment requires interfacing with Silicon and hardware design engineers, Software developers, Signal Integrity, and System Validation teams. The proximity to Signal/Power integrity simulation activities - we are a single SI/EV team - is another powerful advantage, enabling joint simulation-measurement effort.
What will your job look like:
You will join a relatively small team of talented and experienced EV/SI/PI engineers with wide scope of responsibility, from Pre-Si SI/PI simulations to Post-Si Electrical validation and debug, covering all the high-speed analog interfaces of our EyeQ products.
Responsibilities include performing electrical spec compliance and system margin validation, interface optimization, statistical results analysis, validation flow definitions, and automation, etc.
You will also deal with FW development, automation enabling, data post-processing and debug of high-speed interfaces, like LPDDR4/5, PCIe Gen4/5, and D/C/MPHY.

Required Production Configuration Manager
The Quality team is responsible to foster quality and excellence in our products and processes across the entire company. MEQ team focuses on ensuring high customers' satisfaction through continuous improvement and implementation of automotive standards and best-practices such as ASPICE, IATF16949, ISO 9001, VDA/AIAG Core Tools and ISO26262, both internal and across the entire supply chain, In order to support MEQ objectives, The QMS & Production Quality team is looking for a Production Configuration Manager.
What will your job look like:
Define and implement cross company configuration and change management process, incl: KPIs, Inputs, Outputs, Control points, Reports (from scratch)
Work closely with colleagues from other departments (PMs, development engineers, production engineers, management) and other organizations (suppliers and customers) to realize relevant activities
Define work items/products release process.
Manage and verify retention, back-up and recovery of company products/projects work items.
Create, manage and update PPAP folders for company products
Identify opportunities for improvement and execute them.
Create relevant work items templates and coach the team how to use them.
CCB team - Lead/participate.
Support configuration & change related issues with customers, suppliers and 3rd party organizations.

Were looking for a Physical Design STA Technical Expert to join the growing Physical Design Team, responsible for state of the art SoC design from definition to Tape-Out.
What will your job look like:
Leading FC timing activities & methodologies for brand New SoC, from definition to TO.
Writing design constraints (SDC) for FC/IP/Block levels for all modes.
Involved in chip architecture definition for functional & DFT domains.
Working in close collaboration with the front-end & architecture team.
Working with engineers to identify and overcome roadblocks and obstacles.
Defining AC timing from spec to implementation.
Supporting complex clock structures.

Were looking for a Physical Design Expert to join the growing Physical Design Team, responsible for developing our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

We are looking for a skilled and motivated Embedded SW Integration Team Lead for the Platform OS Department to manage the daily integration of the OS deliveries into our SW stack. The Platform OS team is leading a global effort of making the Linux OS as the Automotive Safety OS that will fuel the Autonomous Vehicle and the whole automotive industry. Youll lead a fast-paced, hands-on and dynamic team of integration and automation engineers, contributing to the overall qualification and integration effort while collaborating with other teams across the organization.
What will your job look like:
Lead and mentor a team of 4-6 SW Integration and Automation engineers
Manage the daily integration of the aggregated delivery of all OS teams upstream into our SW stack.
Daily tracking of changes coming from OS development teams and controlling their integration order, priorities, test coverage and conflicts.
Managing a daily integration forum to track nightly tests reports, triaging new issues found and assigning them to development teams.
System level understanding of the OS features and tracking the test coverage developed by the OS developers.
Tracking the utilization, health and allocation of the HW resources in the farm.
Balancing test coverage to HW availability through tracking CI load.
Acting as a PoC for all OS integration issues. Both within the OS teams and externally.
Tracking bug escapes and their mitigation in the OS test coverage.

Our EyeQ Platform Group (EPG) is seeking a motivated Formal Verification Engineer to join our team and contribute to development of hardware verification environments.
This position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
This is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle.
What will your job look like:
Be the owner of formal verification environment from first draft to sign-off stage
Apply formal methods to verify the correctness of various complex digital systems
Work with HW architects\designers to define assumptions, rules and cover properties
Help define the formal verification methodology and environment to be applied by the team
Explore new Formal methods and Tools
Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago
Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf.

Our Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of our future AI and deep learning HW accelerators.
This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like?
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.

Required Experienced SoC Verification Engineer
Which department will you join?
The SOC verification group owns the important and challenging job of verifying our chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.