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We are seeking a highly motivated Chip Design Architect to join our team of experts and help shape the future of high-performance computing. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs. As a Chip Design Architect at our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.
What you will be doing:
Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project.
Define the HW boot, clock and Reset architecture for Switch ASIC
Develop slow-speed interface architecture specifications and design guidelines, conduct trade-off analysis for different architecture options, and oversee the implementation of the chosen architecture by the chip design / FW / SW teams.

we are looking for best-in-class Physical Design Team lead to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
Leading and mentoring Physical Design-Backend team.
Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Take part in project definition towards POR, close interaction with other domains such as FE, ARCH.

we are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What you will be doing:
Join Beer-Sheva/Tel-Aviv group, working on verification/design in the field of encryption accelerators.
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.
Daily work will involve verification and might involve any or all aspects of chip development including design and micro-architecture.
Work closely with firmware and other groups around the globe.
Work mode: Hybrid home-office.

We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team.As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What You'll Be Doing:
Work in a design/verification team which develops core units within the Switch silicon.
Micro-architecture of dynamic verification environments planning for units and modules.
Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

We are now looking for a best-in-class Senior Chip Design Engineer to join our outstanding GPU-Networking Silicon Engineering team. As a DV Engineer at our company's GPU-Networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry our companys GPU Super-Chip.
What youll be doing:
Work in a DV (Design Verification) team that has a global responsibility over deliverable units and clusters to the silicon GPU
Integrations and Full-Chip models
Verification of chip blocks/entities according to specifications under challenging constraints
Your daily work will involve all aspects of Design Verification : Planning, Coding, Coverage and Integration.

Power the Future with us! At SolarEdge (NASDAQ: SEDG), we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. SolarEdge is looking for a Certification Engineer to join our compliance team. This role will work closely with multiple design engineering and test teams to ensure designs compliance with all regulations all over the world. The most important traits at SolarEdge are a positive attitude towards the project, hard work ethic, being able to self-manage and learn new skills. Forward thinking will be highly regarded as well. Responsibilities:
* Be a part of the compliance team for SolarEdge’s products.
* Perform in house certification tests under international accreditation scheme.
* Understand, Interpret, advise and assist in implementing product compliance requirements.
* Developing, reviewing, and approving certification and R&D-related documents.
* Interacting with multi disciplines departments such as R&D/Product/Logistic


Country:
Israel

City:
Herzliya

We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group.
As a Chip Design Engineer at our company's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Perform advanced Static Timing Analysis (STA) for NiC and SoC projects.
Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

At our company, you will be joining a team of dedicated Physical Design Engineers who excel in developing high-speed communication devices. Our team is recognized for delivering highly efficient and low-latency products. Join us to contribute to groundbreaking chips in a professional environment. This is an ambitious role where you will compete and excel in a collaborative environment.
You will be empowered to determine and successfully implement world-class solutions. Join us to be part of a team where your work will be flawless, and your career will thrive in our encouraging and inclusive culture. our company has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!
What you'll be doing:
Learn and implement the complete place & route flow, using sophisticated software tools.
Be responsible for the physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed to and work on a variety of exciting designs, including high cell count and high frequency blocks, resolving timing and congestion problems.
Engage in the complete design chip development flow (RTL2GDS) including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

we are looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part inflows development.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.
As a Senior Chip Design Verification Engineer in the DFT team at our company, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Responsible for chip floorplan and pins placement
Running, debugging and approve Physical verification flows across multiple projects
Perform physical layout planning and optimization.

our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's an outstanding legacy of innovation that's fueled by great technologyand outstanding people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an worker , youll be immersed in a diverse, encouraging environment where everyone is motivated to do their best work. Come join the team and see how you can make a lasting impact on the world.
we are seeking a network security research architect who is interested in a chance to define, research, and implement next-generation security features for data centers networks. The position will take on a lead role, working with teams with varied strengths across our company and with external partners to research security requirements for networking products.
What you'll be doing:
Lead, research, design, develop, and implement solutions for securing networks and identifying threats and incidents in the network.
Apply innovative security primitives to enable secure platforms.
Collaborate across external and internal hardware and software research teams.
Architectural modeling, validation, microarchitectural definition, following standards bodies, and developing proof-of-concepts secure platforms.
Research network telemetry for supporting secure networking platforms confidentiality, integrity, and availability.

our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's an outstanding legacy of innovation that's fueled by great technologyand outstanding people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As an worker, youll be immersed in a diverse, encouraging environment where everyone is motivated to do their best work. Come join the team and see how you can make a lasting impact on the world.
We are seeking an experienced Malware Research Architect who can design and implement advanced malware detection systems using Virtual Machine Introspection (VMI) techniques. The ideal candidate should have deep expertise in developing out-of-VM security solutions that can detect and analyze sophisticated malware, rootkits, and other cyber threats by introspecting and reconstructing volatile memory states of guest operating systems and file system states. Strong knowledge of file systems, and hypervisor technologies is essential. The candidate will craft automated malware detection systems that use VMI and file system techniques to predict early signs of malware execution and accurately classify unknown threats.
What you'll be doing:
Lead, research, design, develop and implement solutions for next-generation secure networks.
Develop novel introspection, memory forensics, and file system methods to extract critical security events towards threat detection.
Collaborate with external and internal hardware and software research teams to apply extracted events for advanced malware detection.
Architectural modeling, validation, microarchitectural definition, and developing proof-of-concepts secure platforms.

we are looking for a best-in-class STA Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking large scale and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
Be in charge of full-chip/Chiplet level STA convergence from early stages to signoff.
Take part in floor plan design and Netlist creation with aim to optimize timing convergence and work efficiency.
Define and optimize, together with CAD, STA signoff flows and methodologies.
Digital Partitions' and analog IPs' timing integration, giving feedback and driving convergence.
Work closely with logic design and DFT engineers to define and implement constraints for the various work modes, including optimizing them for runtime and efficiency.