דרושים » תוכנה » IP Pixel RTL Design Engineer

As an ASIC Design Engineer in the IP design team, you will work closely with architecture, design, and verification teams to build high-performance designs. Apply your knowledge of computer architecture and digital design to enable high-bandwidth processing pipelines!
Responsibilities
Coding high-quality RTL, with embedded assertions and cover points
Writing detailed micro-architectural specifications
Collaborating with multi-functional teams to explore solutions that improve performance while minimizing power and area
Working closely with design verification and formal verification teams to debug and verify functionality and performance

As part of our Silicon Technologies group, youll help design our next-generation, power-efficient, system-on-chip (SoC). Our wireless SoC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level. Joining this group means youll be responsible for crafting and building the technology that fuels our devices. Together, you and your team will enable our customers to do all the things they love with their devices.

If you enjoy a fast-paced and challenging environment, and collaborating with people across different functional areas as well as thriving during crisis times, we encourage you to apply.

Responsibility of block and/or sub-system micro-architecture and design implementation.
Work with architects and system teams to define the right solution for the product requirements.
Implement block and/or sub-system design, analyze performance and power and support verification teams.
Responsibility of FE flows such as synthesis, CDC, RDC and Lint to ensure high quality production worthy design.

Imagine what you could do here. At our company, new ideas have a way of becoming extraordinary products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at our company. The people who work here have reinvented entire industries with all our Hardware products. The same real passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Do you want to join us to help deliver the next groundbreaking our products?

In this highly visible role, you will be working with the elite CPU and SOC teams which powers products that are exceptionally efficient and exceptionally performant. You will be at the center of a chip design effort interfacing with all disciplines spread across multiple geographies, with a critical impact on getting functional products to millions of customers quickly.

The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

Play a critical role in end-to-end verification of memory subsystem by developing an in-depth understanding of cache coherence protocols and functioning of various units in CPU/SOC that are relevant to memory subsystem verification. These units include Load-Store unit, different levels of caches, bus interface units, memory controller, etc.
Develop verification environment which can be used in both simulation and emulation.
Develop synthesizable transactors and test benches and support verification hooks for verifying memory subsystem functionality and CPU/SOC features.
Develop unit level stimulus as well as full chip assembly or C programs to verify memory subsystem functionality.
Develop verification IPs that can be utilized by Apple teams worldwide
Work closely with the CPU/SOC RTL spread across US and Israel to understand the specification in detail for developing verification strategy taking system level considerations into account.
Develop coverage monitors and accomplish coverage goals for closure of the design.
Develop abstract end-to-end checks to verify CPU-SOC memory subsystem interaction and coherence protocols

Join our team in a pivotal role where you'll own the entire IP-level netlist generation and timing convergence journey from synthesis to sign-off.
You'll drive synthesis, UPF power intent, scan insertion, and external IP integration while architecting timing constraints for both standard and complex custom designs that ensure sign-off quality from day one.
Working at the intersection of multiple disciplines, you'll partner closely with RTL designers to deeply understand design intent and clock architecture, collaborate with CAD teams to shape and optimize cutting-edge flows, and team with Physical Design engineers to achieve flawless timing sign-off.
We're seeking an innovative thinker who brings fresh perspectives to timing analysis methodologies and proactively identifies and resolves timing challenges to eliminate pessimism and accelerate convergence, ultimately making their mark on next-generation chip design.

We are seeking a software engineer to build high-performance software models of advanced SoC designs and to help bridge the gap between Software and Hardware, influencing performance improvements, power efficiency, security, and the programming ease of Apple products.
Responsibilities
In this role, you will:
Develop software systems and tools used to bring up the future OS on future SoCs.
Support kernel and driver development on future processor & SoC models.
Work closely with software and hardware teams across product and research groups.
Promote new opportunities and techniques with other groups.

Somewhere between the physics of a sensor and the software people touch, there is a layer that decides whether a breakthrough actually works. That layer is yours.
We're a small, truly multidisciplinary team that spans high-level software down to low-level physics, and we're building the foundation for our next big technology. As a Senior Software Engineer, you'll build the iOS- and macOS-based, low-latency application layer of our data collection and research system. It is the infrastructure that turns raw, real-world signals into the data that trains and validates the next line of our AI products. You'll write the code that makes it all work, and you'll help shape the applications built on top of it.
This is a rare chance to work on something new, from day one, alongside people who see the whole stack.

Responsibilities
Help create the next line of our AI products by building the infrastructure and laying the groundwork they will stand on.
Design and build low-latency middleware components for our-platform applications (iOS and macOS) supporting data collection and research workflows.
Own end-to-end implementation: architecture, coding, debugging, and performance tuning across the application layer.
Contribute to the design and implementation of downstream applications that consume the middleware (not just the plumbing - the product too).
Write robust, production-quality code in C++, Objective-C/C++, and/or Swift for performance-critical and system-level components, and Python for tooling, data processing, and automation.
Collaborate closely with firmware, data, and research teams to ensure the middleware correctly reflects real-world device and sensor behavior.
Use modern AI-assisted development tools as a core part of your workflow - for code generation, debugging, test authoring, and accelerating iteration.
Participate in design reviews, code reviews, and architectural decisions for the broader system.

Responsibilities
Help create the next line of our AI products by leading the build of the infrastructure and groundwork they will stand on.
Lead the architecture and delivery of the low-latency middleware layer behind our iOS and macOS data collection and research applications.
Stay hands-on: write code, review pull requests, and debug the hard problems alongside the team. This is not a purely managerial role.
Set technical direction and coding standards across C++, Objective-C/C++, Swift, and Python.
Own the roadmap with research, firmware, silicon, and product partners, and turn ambiguous, ambitious goals into a concrete technical plan.
Drive design and implementation decisions for the applications on top of the middleware, not just the layer underneath.
Mentor and grow a team of strong engineers, and run the design and code reviews that set the culture.
Bring AI-assisted development into the teams daily workflow and show how much a small team can ship.
Work across the whole stack, from high-level software to low-level physics, and connect the disciplines that make it work.

We're seeking a passionate and skilled Embedded Firmware Engineer to play a pivotal role in delivering the next generation of us. In this highly visible position, you'll be at the intersection of hardware and software, collaborating closely with logic designers to deeply understand system-level operations and performance requirements for hardware validation.

In this role, you will develop critical low-level embedded firmware specifically designed to validate hardware functionality, ensure conformance, and drive performance during the bring-up and testing phases of new silicon. This involves designing, developing, and integrating complex drivers, diagnostic tests, and infrastructure essential for SoC bring-up, post-silicon validation, and debugging activities. Ultimately, you'll lead hands-on firmware development, system-level validation, and problem-solving at the hardware-software interface in a dynamic, collaborative environment, with your work directly enabling the successful launch of future our products by ensuring our silicon meets the highest standards.

We are seeking a talented and versatile Senior Threat Detection Engineer to work with us in Herzliya with expertise in iOS and Android security. As a key member of our engineering team, you will play a crucial role in designing and developing complex compromise detection solutions and providing advanced professional services to customers to assist them in determining whether their mobile devices have been compromised.

Responsibilities:
Design and develop mobile focused on-device and off-device malware and compromise detection solutions that enable forensic analysis, including infrastructure, features, classification logic, tools, proof of concepts, heuristics and signatures for Android and iOS devices.
Represent the Company in front of customers by providing advanced professional services including malware and indicator of compromise analysis to determine if devices have been compromised, as well as professional training sessions.
Develop and implement components and features using C, C++, Python, assembly, Java, JavaScript, Go, Rust and other programming languages as needed, while employing secure coding practices and ensuring optimal performance, responsiveness, and cross-platform compatibility in line with product specifications.
Represent the company in front of potential customers and partners by conducting technical demonstrations, participating in meetings and other pre and post sales engagements.
The position may require local and international travel.