לוח משרות דרושים

As a Design Verification Manager for the IP Group, you will lead a focused team responsible for the quality and reliability of our critical IP blocks. You will steer the IP verification roadmap, oversee the development of complex testbenches, and ensure our next-generation AI silicon meets the highest standards. Leading a team of talented engineers, you will tackle challenges at the unit and sub-system levels, playing a pivotal role in delivering high-performance hardware for the worlds largest AI clusters.

Key Responsibilities



Lead and mentor a team of design verification engineers, defining the technical roadmap and methodology for ASIC verification across unit and IP/sub-system levels
Drive the creation and execution of comprehensive design verification plans, ensuring all functional requirements are met on schedule for complex digital IPs
Oversee the architecture and maintenance of block-level verification strategies, heavily utilizing SV-UVM, alongside Formal Verification where applicable
Define functional coverage goals and quality metrics, driving the IP team toward 100% verification closure and sign-off
Partner closely with IP Design and Architecture teams to align on specifications, root-cause complex bugs, and optimize the IP development cycle

As a Senior/Staff Design Verification Engineer, you will be a key architect of quality in our Israel R&D center. You won't just run tests-you will design comprehensive verification strategies for high-performance digital blocks, IPs, subsystems, and full-chip integration. You will work at the cutting edge of AI infrastructure connectivity where "good enough" isn't an option, owning end-to-end verification plans for our most challenging designs. If you thrive on solving complex verification challenges and want to ensure the quality of chips powering the world's largest AI clusters, this is your opportunity.

Key Responsibilities

Verification Environment Architecture & Development

Design and develop comprehensive ASIC verification environments across all levels-from unit-level and subsystems to full-chip integration
Build sophisticated SystemVerilog/UVM-based testbenches including protocol/traffic generators, monitors, checkers, and functional coverage models
Own end-to-end verification plans for highly complex digital blocks, defining the "how" and "what" to ensure 100% functional coverage
Quality Assurance & Debug Excellence

Drive the debug process and leverage advanced methodologies to find critical bugs before silicon
Develop and execute comprehensive test plans to verify functionality, performance, and corner cases
Ensure verification closure through rigorous coverage analysis and assertion-based verification
Cross-Functional Collaboration & Technical Leadership

Partner with design and system architects to solve intricate hardware verification challenges
Work alongside world-class teams where knowledge sharing and technical excellence are the standard
Contribute to verification methodology improvements and automation initiatives

we're seeking a visionary Formal Verification Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the formal verification strategy for chips that power the world's largest AI clusters.

As the Formal Verification Engineer, you will be a foundational member of our Israel R&D center. You wont just execute tasks; you will define the Formal verification strategy for chips that drive the worlds largest AI clusters. You will dive deep into the technical details, proving the correctness of complex designs and ensuring they flawlessly meet specifications.

Key Responsibilities

Own and develop formal verification environments from scratch through to sign-off
Apply formal verification methodologies and strategies to prove the correctness of intricate designs
Work closely with the Architecture, Design, and DV teams to identify verification needs and pinpoint design requirements
Create robust formal environments, analyze complex RTL designs, and apply advanced formal techniques to find corner-case bugs
Analyze verification results, identify failures, and collaborate directly with designers to resolve issues efficiently
Architect and develop generic, common formal functions and properties to be reused across multiple projects

We are seeking a highly skilled and motivated physicist/engineer to join our experimental physics group. You will play a crucial role in our quantum computing research and development efforts. You will work on the design, implementation, and optimization of novel optical cavities, as well as their integration into our quantum computing platforms. You will collaborate closely with a multidisciplinary team of physicists and engineers to push the boundaries of photonic quantum computing.
Key Responsibilities:
Develop, construct and operate optical cavities, to serve photonic quantum computing.
Communicate with external manufacturers to optimize process results.
Develop new methodologies to improve system performance.

We are looking for an excellent Production Quality Engineer to join the QA product team.



Job Description:

Serve as owner of the NCMR process: manage the end-to-end handling of non-conforming materials, products, and processes, including initiation, investigation and corrective/preventive actions in accordance with company procedures and regulatory requirements.
Monitor NCMR process including quality KPIs
Support for non-conformity investigations and assign effective corrective actions for NCMRs and ensure timely closure and documentation.
Perform / review Root Cause Analysis as part of NCMR process and assign relevant corrective actions.
Act as QA representative for Manufacturing Quality process
Conduct quality assurance activities such as data analysis and statistical evaluations, SOP review and approvals, audit preparation

we are a leading silicon photonics company developing advanced solutions for data center connectivity.
We are looking for a hands-on Facilities & Lab Manager to take full ownership of our office and laboratory environments.
This role reports directly to the VP Operations.
Responsibilities
Own day-to-day operations of office & labs
Maintain, repair, and install infrastructure & equipment (hands-on / vendors)
Ensure a clean, organized, and fully functional work environment
Keep labs efficient and ready for fast-paced R&D work
Perform preventative maintenance on lab equipment
Work closely with R&D/engineering on experiments and new tools
Ensure labs support both development and production-scale activities
Manage external vendors and ongoing facility services
Own safety procedures and compliance (including storage & disposal of materials)
Responsible for company security
Lead renovation and construction projects .

We are looking for a satellite networking Lab Coordinator. You will be responsible for overseeing our cutting-edge physical & virtual lab operations, ensuring smooth, automatic & reliable functionality, and driving innovation in our multidisciplinary technological solutions.

What you will do
Plan, organize, and oversee day-to-day operations of the lab to ensure efficiency and effectiveness.
Maintain and manage lab equipment, tools, and supplies, ensuring compliance with security standards.
Automate deployment, maintenance & monitoring processes, to support the R&D delivery processes.
Collaborate with R&D teams to plan, coordinate, and execute research initiatives and experiments within the lab.