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Outstanding opportunity to be part of a super-cutting-edge team working on systems above and beyond the globe.



What you will be doing​



Writing system validation Test plans , Design and develop Test programs to validated embedded system features and performance.

Conducting System Validation Test cycles to verify systems based on HW (analog and Digital), RF, SW, FW

Experience with Python or C programing, Git or other programming languages & source control.

Strong technical troubleshooting.

Develop tools and utilities for Lab & field testing, feature analysis

High debug capabilities when work with the Software, systems, HW teams on complex issues.

Ability to move fast and decisiveness.

Building development environment.

Designing automate tests.

E2E ownership product from kickoff to production.

We are looking for highly motivated, experienced, and passionate wireless algorithm experts for the research and design of advanced cellular communication algorithms, leveraging neural networks and machine learning techniques, for our 5G and beyond products.
What you'll do:
Conduct algorithmic research, balancing performance, implementation cost, real-time constraints, and time-to-market, with a strong focus on ML-based approaches for PHY layer processing.
Design and train neural network models for PHY tasks such as channel estimation, signal detection, beamforming, and decoding, targeting real-time inference on embedded platforms.
Develop algorithms from initial research and simulation through to official customer releases, including literature reviews, ML model prototyping using Python, PyTorch, and TensorFlow, MATLAB modeling, specification writing, and support throughout implementation and end-to-end integration.
Evaluate and benchmark ML-based solutions against traditional DSP approaches, considering accuracy, latency, computational cost, and overall system performance.

Prisma-Photonics is a rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc.). The company offers an award-winning disruptive solution; a “sensor free” approach to smart infrastructure. The company is VC backed and in the revenues stage. Combining pioneering technology in optical fiber sensing with state-of-the-art machine learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly.
We are looking for a talented, self-driven, and hands-on Electro Optics Systems Engineer to join Prisma Photonics’ R&D team. In this role, you will develop and advance next-generation distributed fiber-optic acoustic sensing (DAS) systems, combining electro-optic system design, performance modeling, simulations, experimental validation, and field data analysis. You will tackle complex physical and engineering challenges, contribute to next-generation product development, and collaborate closely with multidisciplinary teams to bring innovative sensing technologies from concept to real-world deployment. This role is ideal for someone who thrives in a fast-paced, hands-on R&D environment, enjoys working across disciplines, and wants to see their work translate into real-world impact.

Hiring Manager:
Eyal Hollander

What You’ll Do:

* Lead experimental and theoretical R&D efforts for the development of Prisma’s next-generation distributed fiber-optic acoustic sensing systems.
* Design, evaluate, and optimize electro-optic interrogation systems for distributed acoustic sensing applications.
* Develop system-level models and simulations for optical signal generation, fiber propagation, coherent detection, system noise, SNR, and sensing performance.
* Build software tools and simulations in Python, C++, or similar languages for system evaluation, signal processing, field data analysis, and performance modeling.
* Plan, execute, and analyze laboratory and field experiments to validate system performance and support product development.
* Gain unique end-to-end expertise across the full sensing system pipeline, spanning fiber optics, electro-optics, coherent detection, DSP algorithms, and advanced data analysis.
* Lead product development activities from ideation and proof of concept through design, qualification, validation, and deployment.
* Collaborate closely with multidisciplinary R&D teams, including physicists, software engineers, algorithm developers, and hardware engineers.
* Communicate effectively with both technical and non-technical stakeholders, translating complex system behavior into clear insights and actionable recommendations.


What You Bring:

* BSc or MSc in Physics, Optical Engineering, Electrical Engineering, system engineering or a related field.
* At least 4 years of experience in multidisciplinary electro-optic systems, either as a Systems Engineer or in hands-on electro-optic, fiber-optic system design, integration, testing, or performance evaluation.
* Experience with noise analysis, including phase noise, detector noise, amplifier noise, SNR, and related system performance metrics.
* Experience with advanced optical measurement techniques, laboratory setups, and system characterization.
* Strong programming skills in Python, C++, or similar languages.
* Excellent analytical and problem-solving skills, with the ability to connect physical phenomena, system behavior, and data-driven insights.
* Strong communication skills and the ability to work effectively both independently and as part of a multidisciplinary team.
* Ability to manage multiple projects and priorities in a dynamic, fast-paced environment.


Great to Have:

* Knowledge in digital signal processing.
* Experience with telecom optical systems or

As a Wireless Design Verification Engineer, you will be part of a team that is responsible for pre-silicon RTL verification of communication subsystems, SoC sub-systems and chip-level functionality. The activity may focus on block level, sub-system level or chip level, including end-to-end simulations of the entire data/control path. You will interact with DV methodologists, designers and communication systems engineers to develop reusable testbench and verification environment deploying the latest methodology with metric driven verification.

Description
- Own critical block and sub-system verification of wireless SoC projects.
- Architect and develop testbenches and environments, by using state-of-the-art verification methodologies.
- Define verification plan, create, simulate and debug test scenarios.
- Drive regression and coverage analysis to ensure high quality DV.
- Collaborate with design and systems engineering teams to review requirements, specifications and architecture, extract features and define DV attribute.

Develop the optimization and computational-geometry algorithms at the core of us: for researchers who love hard, non-convex problems.

Required Senior DDR Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing. You will verify digital designs, collaborate closely with colleagues on projects, and perform direct validation. You will construct testbenches that exercise hardware through corner-cases and expose bugs. You will manage the full life-cycle from planning and execution to closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

In this role, you will join our Formal Verification team, executing full verification cycle from architectural definition and FV strategy definition to full execution and final sign-off, utilizing advanced Formal Verification methodologies and tools.
This role allows for independent work, impactful input, and substantial contributions to the VLSI departments verification tasks
Responsibilities:
Develop Formal Test benches and Properties - Write and maintain System Verilog Assertions to formally verify RTL designs using industry-standard formal tools.
Collaborating with Design and Verification Teams.
Contribute to Verification Planning and Coverage.
Define formal verification plans, track progress, and contribute to achieving verification completeness.

Required Emulation Verification Tech Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Lead, plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.

As a quantum researcher, your main role will be to develop algorithmic and error-reduction tools to help our partners and customers achieve quantum advantage for their applications. You will develop our error reduction methods, including mitigation and correction, and apply them to different use cases by optimizing existing methods, developing new algorithms, and adapting these tools to the realities of running on quantum hardware. This includes taking into account application requirements, noise characteristics, device constraints, and performance on real quantum devices.

Responsibilities
Developing new error reduction methods, including mitigation and correction, for quantum algorithms.
Optimizing error reduction methods for different algorithms, applications, and hardware settings.
Developing new quantum algorithms to enhance performance on real quantum hardware with error mitigation.
Conducting research on applications of quantum computing with our partners, including implementing and running proof-of-concept demonstrations of these applications on real quantum hardware. 

Required Junior AI SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will join a high-performing Research and Development team dedicated to delivering high-quality silicon. You will partner with cross-functional technical teams throughout the full development lifecycle, taking ownership of quality assurance strategies from the initial concept through final tape-out.
Responsibilities
Plan digital design block verification by analyzing specifications and identifying critical scenarios with design engineers.
Create and enhance constrained-random environments using SystemVerilog and Universal Verification Methodology (UVM), or execute formal verification using SystemVerilog Assertions (SVA) and industry-leading tools.
Identify and write all types of coverage measures for corner-cases.
Debug test failures alongside design teams to ensure block correctness.
Analyze metrics to resolve coverage gaps and drive progress toward tape-out.