לוח משרות דרושים

we're seeking a highly skilled Physical Design CAD Engineer specializing in CAD Automation and Signoff to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, implementing the backend execution environment and methodologies for chips that power the world's largest AI clusters. As a foundational member of the team, you will be responsible for the physical implementation environment. Your primary mission is to develop, optimize, and support automated flows from RTL to manufacturable GDSII tape-out, ensuring a methodical and efficient work environment for the entire PD team.


Key Responsibilities


Develop and maintain automated flows for Synthesis, Place & Route (P&R), and Floor-planning to ensure seamless design transitions
Implement and manage robust environments for Static Timing Analysis (STA), Power Analysis, and Physical Verification (DRC/LVS/ERC)
Write and maintain custom plug-ins and scripts (Tcl/Python) to extend vendor tool capabilities, tailoring them to specific process node constraints
Build automated "dashboards" and feedback loops to track and improve Power, Performance, and Area (PPA) metrics across design iterations
Own the design database structure and version control to ensure team alignment and data integrity
Collaborate directly with EDA vendors (Synopsys, Cadence, Siemens/Mentor) to troubleshoot flow issues and analyze tool results
Provide technical support to the broader PD team, helping them optimize individual blocks for power, performance, and timing

we're seeking a highly skilled Physical Design CAD Engineer specializing in CAD Extraction to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, implementing the parasitic extraction (PEX) methodologies and flows for chips that power the world's largest AI clusters. As a foundational member of the team, you will be responsible for the accuracy and efficiency of our extraction environment, ensuring that our high-speed designs are modeled with the highest precision from RTL to GDSII.

Key Responsibilities

Develop, qualify, and maintain automated RC extraction flows for high-performance AI SoCs
Own the setup and validation of foundry technology files (e.g., StarRC/Quantus techfiles, TLU+, ITF) across various process corners
Perform correlation studies between different extraction tools and 3D field solvers (e.g., Raphael, QuickCap) to ensure modeling accuracy
Collaborate closely with the Signal Integrity (SI) and Power Integrity (PI) teams to provide accurate parasitic data for critical high-speed nets and power grids
Implement automated scripts (Tcl/Python) to streamline extraction regressions, data parsing, and PEX-to-STA (Static Timing Analysis) handoffs
Analyze the impact of layout effects (LDE) and parasitics on timing and power, providing feedback to the implementation team to optimize PPA
Interface with EDA vendors and foundries to resolve extraction tool bugs and methodology gaps related to advanced nodes (5nm/3nm)

Tax Analyst will be responsible for tracking record and keeping businesses compliant with various applicable tax laws. Will seek and explore relevant incentives and impact of direct and indirect taxes, transfer pricing and filing requirements. Prepare tax estimations and tax accounting analysis and planning. Prepare material, oversee audit and seek potential tax saving opportunities.
in particular the Tax Analyst will be responsible for the following tasks:
Preparing and review of quarterly and annual income tax provisions and tax accounting
Forecasting quarterly global tax rate and expenses.
Administering tax audits on worldwide basis
Explore relevant tax regulations and investigate applicable tax law developments
Identifying and communicate issues that may arise in tax dealings
Record keeping of foreign income tax filings
Reconciling income tax accounts
Calculating and managing income tax advance payments exploring for benefit programs
The Tax Analyst will report to the Corporate Tax Director.

we are a world leader in 3D printing!
we are leading the global shift to additive manufacturing with innovative 3D printing solutions for industries such as aerospace, automotive, consumer products and healthcare. Through smart and connected 3D printers, polymer materials, a software ecosystem, and parts on demand, our company solutions deliver competitive advantages at every stage in the product value chain. The worlds leading organizations turn to our company to transform product design, bring agility to manufacturing and supply chains, and improve patient care.
As part of this role you will:
Provide on‑line engineering support and resolve mechanical/technical issues fast.
Improve yield, cycle time, labor efficiency, and overall production performance.
Maintain and optimize work instructions, documentation, tooling, and fixtures.
Support NPIs/EOL and collaborate with cross‑functional teams, subcontractors, and partners.
Reduce rework and scrap and lead second‑source qualifications to strengthen quality and supply resilience.

we're seeking a highly skilled Physical Design Engineer specializing in EMIR & Power Integrity to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As a Physical Design Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.

You will execute the Electro-Migration and IR Drop (EMIR) analysis and sign-off from block level to full-chip, working closely at the intersection of Physical Design, Analog/Mixed-Signal design, and Package Engineering. You will be responsible for validating power grid architectures to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.

Key Responsibilities

Execute static and dynamic IR drop analysis, signal/power electromigration (EM) verification, and self-heat analysis from the block level through to full-chip sign-off
Implement and maintain robust EMIR flows and methodologies using industry-standard tools (Ansys RedHawk-SC, Cadence Voltus, or equivalent)
Work with Physical Design teams to implement optimal power grid structures, via pillars, and strap distributions to minimize voltage drop while maximizing routing resources
Collaborate closely with Analog/SerDes designers to analyze current profiles and ensure robust power delivery to sensitive high-speed IP blocks
Partner with Package Design engineers to perform Chip-Package-System (CPS) co-analysis, optimizing bump patterns and package routing for superior Power Integrity
Perform root-cause analysis for voltage drop violations and EM risks, proposing and implementing layout fixes alongside the PD team
Verify current density rules for ESD protection networks and ensure compliance with strict foundry reliability constraints
Support silicon bring-up by correlating simulation results with actual silicon measurements and yield data

we're seeking a highly skilled Static Timing Analysis (STA) Engineer to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the sign-off methodology for chips that power the world's most advanced AI clusters. As an STA Engineer, you will be deeply involved in the STA activities from chip partition and time budgeting through to final sign-off. You will bridge the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.

Key Responsibilities


Execute the STA flow and sign-off methodologies, ensuring our products meet rigorous timing criteria for the most demanding data center environments
Collaborate closely with Architecture, Design, DFT, and Backend teams, participating in timing reviews and working with block owners to navigate the path to sign-off convergence
Develop, optimize, and manage complex SDC constraints, ensuring they are accurate and robust across multi-scenario environments
Analyze and resolve challenges related to cross-chip clock distribution networks and apply sophisticated margining techniques to ensure robust silicon across all process corners
Participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and custom scripts to make our sign-off process faster and more efficient

We are looking for an HR Recruiter to join our global Talent Acquisition team at our company.
This role offers the opportunity to lead meaningful recruitment processes, work closely with hiring managers, and bring initiative, creativity, and innovative thinking into our recruitment practices , with a strong focus on inclusion, diversity, and equitable hiring.
Temporary position ~8 months | 80% role
Location: Rehovot | Hybrid
Key Responsibilities:
Lead meaningful recruitment processes in close partnership with hiring managers
Proactively source candidates using LinkedIn Recruiter and creative sourcing approaches
Conduct phone and in-person interviews and support the hiring process through the offer stage
Build and maintain strong talent pipelines for current and future hiring needs
Ensure a positive and professional candidate experience
Coordinate interviews and manage communication with candidates and internal stakeholders
Additionally, support recruitment processes for contractors, students, internships, and internal mobility initiatives
Work with placement agencies and support the employee.

We at our company are passionate believers in the value and power of 3D printing, and in the change it can bring to design, innovation and manufacturing. The solutions we create are used by over 20,000 enterprises worldwide, and are rapidly changing the way products are imagined, designed, marketed, produced, supplied and sold. We are literally shaping the world that surrounds us - from the products and services in our lives and homes, to our health and quality of life, our transport, security and economies, to how we teach, research and even learn.
The Global Planner & Floor Controller Student is responsible for planning, scheduling, and monitoring global production and material flows to ensure on-time delivery and operational efficiency. They coordinate between production sites, logistics, procurement, and warehousing to balance capacity, manage constraints, and maintain execution visibility. The role drives floor control activities, tracks work orders, and ensures alignment between planning and real-time factory performance.
Location: Kiryat Gat
Key Responsibilities:
Plan and oversee raw material (RM) requirements in alignment with production plans and forecasts, issue PR, and follow up on the supply plan.
Ensure material availability and timely supply to support production schedules
Collaborate with procurement, logistics, and production teams to ensure smooth and efficient material flow
Maintain and update production-related data, including inventory levels, shortages, and delivery schedules
Analyze data across two ERP systems to identify gaps, discrepancies, and improvement opportunities
Manage raw materials (RM) from receipt and quality release through transfer to the tolling site and final consumption
Ensure alignment and accuracy between internal records and toller stock levels, managed across separate ERP systems
Identify discrepancies, conduct root cause analysis, and drive resolution of issues.

As a Staff Physical STA Expert , you will hold the keys to silicon success. You will be leading the STA activities end-to-end from Chip partition, Time budgeting through signoff of all the chips we develop. You will build and lead the STA team to run several chips signoffs in parallel. In addition, You will define the sign-off methodology for chips that power the worlds most advanced AI clusters. You will act as the central nervous system of the design process, bridging the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.

Key Responsibilities

Take full ownership of the STA flow and sign-off methodologies. You will establish the rigorous criteria that ensure our products succeed in the most demanding data center environments
Collaborate closely with Architecture, Design, DFT, and Backend teams. You will lead timing reviews and work closely with block owners to navigate the path to sign-off convergence
Develop, optimize, and manage complex SDC constraints from the ground up, ensuring they are robust across multi-scenario environments
Tackle the challenges of cross-chip clock distribution networks and sophisticated margining techniques, ensuring robust silicon across all process corners
Have a passion for better workflows? Youll participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and in-house automation to make our sign-off process faster and smarter

We at our company are passionate believers in the value and power of 3D printing, and in the change, it can bring to design, innovation and manufacturing.
The solutions we create are used by over 20,000 enterprises worldwide, and are rapidly changing the way products are imagined, designed, marketed, produced, supplied and sold. We are literally shaping the world that surrounds us - from the products and services in our lives and homes, to our health and quality of life, our transport, security and economies, to how we teach, research and even learn.
we are the largest 3D printing solutions company in the world - a company at the forefront of 3D printing innovation for more than 25 years.
In this role you will be part of the sales Operation team and will be in charge of the following:
Responsibilities:
Manage and maintain all types of Global Discount Pricing programs in the ERP Oracle and CPQ SFDC.
Oversee the entire Global Discount Pricing programs lifecycle and approval.
Collaborate closely with Sales, Finance, Regions and SOX to ensure accurate implementation of Global Discount Pricing strategies.
Support audit and compliance requirements by maintaining accurate modifier records and documentation.
Defining and implementing reports
Serve as the focal point for the business, regional teams, Finance and SOX on Sales Operation related Global Discount Pricing processes
Identify process gaps and propose improvements to increase efficiency and accuracy.
Participate in system testing (UAT) related to pricing functionalities and configuration changes.

Tax Analyst will be responsible for tracking record and keeping businesses compliant with various applicable tax laws. Will seek and explore relevant incentives and impact of direct and indirect taxes, transfer pricing and filing requirements. Prepare tax estimations and tax accounting analysis and planning. Prepare material, oversee audit and seek potential tax saving opportunities.
in particular the Tax Analyst will be responsible for the following tasks:
Preparing and review of quarterly and annual income tax provisions and tax accounting
Forecasting quarterly global tax rate and expenses.
Administering tax audits on worldwide basis
Explore relevant tax regulations and investigate applicable tax law developments
Identifying and communicate issues that may arise in tax dealings
Record keeping of foreign income tax filings
Reconciling income tax accounts
Calculating and managing income tax advance payments exploring for benefit programs
The Tax Analyst will report to the Corporate Tax Director.

We are seeking a Quality Engineer to ensure product and process quality across manufacturing, suppliers, and new product introduction activities. The role supports and maintains the Quality Management System, ensures compliance with applicable standards, and implements effective quality controls throughout the product lifecycle. The Quality Engineer leads root cause analysis and corrective actions, works closely with cross-functional teams, and drives continuous improvement to enhance quality performance and customer satisfaction.
Key Responsibilities
Support and maintain the Quality Management System (QMS) in compliance with ISO 9001 and applicable standards
Lead investigations of nonconformances, deviations, and customer issues, including root cause analysis and CAPA
Define and support inspection plans, acceptance criteria, and quality controls across manufacturing
Participate in New Product Introduction (NPI) activities, including design reviews, FMEA, pilot builds, and FAI
Support supplier quality activities, including issue resolution, corrective actions, and performance monitoring
Conduct and support internal and supplier audits and ensure timely closure of findings
Analyze quality data and KPIs to identify trends and drive continuous improvement initiatives
Collaborate with Engineering, Operations, Supply Chain, and other stakeholders to ensure quality objectives are met.

We are looking for a Production Planner to organize production according to demand and quality standards.
An excellent production planner is well-versed in production procedures and ways to optimize them. They are organized and results-driven with great problem-solving skills. Advanced communication and computer skills are very useful for the role.
The goal is to ensure the smooth and cost-efficient flow of our production operations.
Responsibilities
Maintain supply plans to meet demand requirements while balancing inventory, capacity, and service levels
Convert demand forecasts into supply plans, purchase plans, and production requirements
Monitor material availability and identify potential supply constraints or risks
Monitor supply plan execution, lead times, and delivery commitments, and challenge deviations or potential risks with relevant stakeholders
Collaborate with Procurement, Manufacturing, Quality, and Logistics to ensure supply plan feasibility
Analyze inventory levels and recommend optimization actions
Evaluate and incorporate the impact of ECOs on supply and inventory, and propose necessary adjustments
Proactively identify gaps between supply and demand and propose mitigation plans
Support S&OP, supply reviews by providing insights based on supply and demand data
Track and report key supply KPIs as service level, shortages, inventory health, and plan progress
Maintain planning parameters, master data, and planning tools to ensure planning accuracy
Support New Product Introduction (NPI) by coordinating material availability, production readiness, and supply chain alignment to ensure timely launch.

We at our company are passionate believers in the value and power of 3D printing, and in the change it can bring to design, innovation and manufacturing.
The solutions we create are used by over 20,000 enterprises worldwide, and are rapidly changing the way products are imagined, designed, marketed, produced, supplied and sold. We are literally shaping the world that surrounds us - from the products and services in our lives and homes, to our health and quality of life, our transport, security and economies, to how we teach, research and even learn.
we are the largest 3D printing solutions company in the world - a company at the forefront of 3D printing innovation for more than 25 years.
we are looking for a student to join a dynamic and challenging system testing group.
In This Role You Will
Night work (shifts)
Design and build necessary jigs and test benches to conduct testing and reliability experiments.
Analyze problems and document testing detailed reports including complex statistical analysis.
Operating Testing Center machines
Process R&D experiments and collect data
Check and monitor the products quality
Performing machine maintenance and calibration
Interface with R&D engineers.

we're seeking a visionary Formal Verification Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the formal verification strategy for chips that power the world's largest AI clusters.

As the Formal Verification Engineer, you will be a foundational member of our Israel R&D center. You wont just execute tasks; you will define the Formal verification strategy for chips that drive the worlds largest AI clusters. You will dive deep into the technical details, proving the correctness of complex designs and ensuring they flawlessly meet specifications.

Key Responsibilities

Own and develop formal verification environments from scratch through to sign-off
Apply formal verification methodologies and strategies to prove the correctness of intricate designs
Work closely with the Architecture, Design, and DV teams to identify verification needs and pinpoint design requirements
Create robust formal environments, analyze complex RTL designs, and apply advanced formal techniques to find corner-case bugs
Analyze verification results, identify failures, and collaborate directly with designers to resolve issues efficiently
Architect and develop generic, common formal functions and properties to be reused across multiple projects