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As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing:
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

we are looking for a Senior HW architect
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

we are looking for a Senior Core Power Management Architect.
Job Description:
Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.

We are looking for a talented and experienced Physical Design lead to take part in the physical design and help lead the companys BE activities . This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout. In this role, you will be at the center of the companys design efforts and will have a significant influence on our final product.

Responsibilities
Lead blocks and sub systems execution from RTL to GDSII.
Clearly reflect status and execution metrics and help identify and solve execution bottlenecks.
Spec and define full floor plan, including pin placement, partitions, and power grid.
Develop and validate high-performance, low-power clock network guidelines
Perform critical block-level place and route and create designs that meet PPA targets.
Review the vendors physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations.
Work with vendors on defining physical design methodologies and assist in flow development for chip.

we are looking for a Senior CPU Core Architect.
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

We are seeking a highly skilled and experienced PCIe Validation Engineer to join our Silicon and System Validation team, playing a key role in the companys core products. This position involves building a complex validation environment from scratch for pre and post silicon, defining test plan execution and debugging failures while collaborating with cross-functional teams. In this role, you will take ownership of the validation from Emulation thru bring-up to product release in quality that meets our standards.

Responsibilities
Develop and debug PCIe initialization and reset flows.
Develop and execute test plans for pre-silicon and post-silicon validation, including targeted tests for validating specific PCIe functionality.
Take part in Silicon bring-up and power-on stage on Silicon arrival.
Collect and analyze validation data to identify trends and root causes and to uncover opportunities for improving silicon quality, reliability and performance.
Drive the debugging and resolution of complex silicon issues, collaborating with cross-functional teams across design, architecture, software and firmware.

We are looking for a talented and experienced engineer to take part in the Emulation and Prototyping efforts for the companys core product. This position involves building a complex emulation environment from scratch, and collaborating with software, design, and verification teams. In this role, you will be leading emulation from A to Z and will have a critical impact on the company.

Responsibilities
Develop and build complex emulation models for coming generations of our accelerators, including transactors like PCIe, SPI, and embedded CPUs.
Work with the software, design, development, and verification teams to understand the functional and performance goals of the products design
Optimize the model for speed and capacity and develop debug abilities to support software and firmware teams.
Work with software design and development teams to define and develop BFM, test bench, and checker tools.
Review specifications and develop attributes, tests, and coverage plans for the emulation system.

We are seeking a dedicated Firmware Engineer to join our NIC Firmware Core team in Beer-Sheva/Tel-Aviv. You will contribute to the development of brand-new networking adapter technologies, elevating the performance of current and future devices. We develop innovative and next-generation networking devices that are known for their outstanding performance and power efficiency. The position involves all aspects of firmware development, including design, micro-architecture, software interfaces, and verification. We are seeking a dedicated and motivated engineer who will contribute to the development of advanced technology Network Adapters. You will also have the opportunity to create features for leading cloud computing providers and high-performance computing networks.
What youll be doing:
Take a part in the design, development, test, debug, and optimization of low-level firmware layer on next-generation network adapters up to package release
Analyze, integrate, support, and debug low-level firmware layer on verification environments
Collaborate with firmware, software, and architecture teams to analyze, design, and debug legacy and new low-level firmware flow
Improve our team processes including design and implementation of new methodologies, automated processes.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
You will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.
We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.

Our Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovative chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.
Daily work involves acquaintance with all aspects of chip development: Design, Micro- Architecture, Firmware, Production, and Verification.
Engage in cutting-edge PCIe generation working on latest PCIe gen7.

Our Product Engineering group is looking for an experienced Electronics/System engineer to serve as a Technical Project Leader (TPL), join our organization, and be a part of the System Product Engineering organization. The team delivers brand new, high-quality products to our customers, applying the following: Development and deployment of automatic testers for our network business units (Computing network adapters and High-speed switch systems) including hardware, software, and mechanics; Coordinating and leading all aspects of the analysis of manufacturing data to identify and mitigate quality issues using advanced data analysis techniques such as machine learning, statistical tools, and AI; Leading smooth production and capacity enlargement and failure analysis of return material from customers to understand the reason for failures ;Validating test performance and stability using QA (V&V - validation and verification) methods; The TPL leads projects from requirement until end of life; Engineering manager for SPE projects and technical authority across SPE teams
What youll be doing:
Building integration plans, communicating status and priority among the teams (in/outside of SPE), assessing risks and developing mitigation plans
Leading the project lifecycle in the SPE group, which starts at the requirements stage, through chip design and FW stages till SPE MP, including quality and yields improvement plans
Responsible for bugs management prioritization and tracking and relevant knowledge transfer to the SPE group
Working closely with development teams for environment improvements, such as automation, and driving mitigations to reduce risks
Collaborating with PM for schedule tracking and modifications
Evaluating new technologies and testing capabilities for improvement
Working with the testing architecture team (DFT) to assure testing setups and coverage are met
Engaging with a variety of teams: R&D, HW and SW, Chip design, Operations, thermal, signal integrity, FW and SW, layout, and more, Report project status for high level management
You will play a crucial role in shaping the future of our products. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you are a creative and autonomous engineer with a real passion for technology, we want to hear from you. Join us in pushing the boundaries of technology. We are committed to fostering a diverse and inclusive work environment.