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Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macro and cluster-level blocks, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsys and Cadence.
* Engaged in defining implementation and signoff methodologies.

Key job responsibilities
* Design and implement advanced Design-for-Test (DFT) architectures for complex semiconductor platforms.
* Develop high-quality test and debug patterns ensuring robust performance.
* Conduct comprehensive static timing analysis across multiple DFT modes.
* Verify intricate DFT logic and components with precision and creativity.
* Support silicon bring-up and device diagnostic processes.

Your day will be filled with complex problem-solving and collaborative innovation. You'll work alongside world-class DFT engineers in a dynamic environment, developing semiconductor technologies that support global cloud infrastructure. Our team thrives on creativity, technical excellence, and continuous learning.

We are looking for talented Software Development Engineers to join our teams in Tel Aviv or Haifa and work on low-level software development. You will be building the foundational software layers that sit closest to the hardware - enabling high performance, reliability, and efficiency for AWS services at an unprecedented scale.

This is an opportunity to work in a deeply technical environment where your code runs on custom-designed silicon, directly impacting the performance and cost of cloud infrastructure used by millions of customers worldwide.

Design, develop, and optimize low-level software including device drivers, firmware, and hardware abstraction layers.

Collaborate closely with hardware design teams to define hardware-software interfaces and bring-up new silicon.

Write performance-critical systems software in C/C++ that operates under strict latency and resource constraints.

Debug complex hardware-software interactions.

Contribute to system architecture decisions and define software design patterns for next-gen chip features.

Develop and maintain automated test frameworks to validate functionality and performance at scale.

Participate in code reviews and drive engineering best practices within the team.

We are looking for Software Automation Engineer to help us develop a semiconductor platform based on a revolutionary architecture.

Take part in the development of products within a disruptive system architecture. Youll have the opportunity to work in a dynamic, open, fast-paced environment, developing the technologies that power the worlds largest cloud provider. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.

Key job responsibilities
As Software Automation Engineer, you'll be responsible for creating ML (Machine learning) and HPC (High performance computing) automation and tools, create CI/CD flows and implement effective dashboards with high scale.

We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification at Annapurna Labs isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written.
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack.
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality.
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development.

We are seeking a highly effective Supply Chain Planner to manage a semiconductor supply chain with multiple products in close collaboration with internal and external cross-functional teams. This role encompasses both production planning and New Product Introduction (NPI) planning responsibilities.
This dynamic role requires interaction with suppliers and internal stakeholders to manage production planning, NPI launches, material movements, supplier coordination, and support for engineering/pre-production builds. The successful candidate will communicate product status and open issues, report available-to-promise, prioritize demand management, and provide strategic direction for supply chain optimization.

Key job responsibilities
Own production plans of multi production lines.
Suppliers management with daily communications providing direction.
Direct communication with customers over demand forecasts and own timely delivery commitments.
Manage NPI from concept to production - Strategic supplier selection, Balance capacity across NPI and volume production.
Plan qualifications and NPI timelines, pilot builds, BOM material availability.
Analyze constraints and present mitigation plans and status to leadership.
Develop long-term supply strategies and contingency plans.
Collect and analyze supply chain data; maintain KPIs and dashboards
Release procurement of the BOM components.
Manage materials across foundries, assembly/test houses, and contract manufacturers, Track WIP, inventory, shortages.

We are looking for exceptional engineers to join the top-tier team developing the next generation semiconductor platform based on a revolutionary architecture. You will participate in design activities, working on the next generation of our products.

As a Chip Design Engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities:
* Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.