Define and lead qualification hardware and test developments in front of internal teams and external vendors.
Define and execute Silicon and package qualification activities (HTOL, ELFR, ESD/LU, b/HAST, THB, etc.).
Extract, manipulate, and analyze large volumes of data from Silicon and Package qualification programs (e.g. HTOL, ELFR, ESD, LU, UHAST, TCT, etc.), High Volume MFG, and field returns to identify failure mechanisms, reliability trends, and opportunities for yield and quality and reliability improvement.
Own cross-functional investigation of IC quality and reliability issues to identify root causes and develop solutions (RMA Triage, Analytics, Failure Analysis, etc.).
Develop and implement physics-based statistical Quality and Reliability models (ELF, TDDB, NBTI, HCI, Time zero failures, etc.) to predict silicon device failure mechanisms, degradation patterns, and lifetime behaviors.
Requirements: Bachelor's degree in Electrical Engineering, Materials Science, a related field, or equivalent practical experience.
8 years of experience in IC silicon quality or reliability.
Experience in semiconductor CMOS technology, device physics, failure mechanisms, and accelerated test methodologies.
Experience in reliability modeling, data analytics, and statistics.
Preferred qualifications:
Experience in semiconductor reliability, manufacturing processes (fab, assembly, test), or IC and packaging failure mechanisms and related failure analysis.
Experience in data analytics, especially to identify commonalities and abnormalities.
Knowledge of Design-for-Reliability guidelines and implementation techniques.
Familiarity with test methods and hardware for silicon qualification (e.g., HTOL chambers, ESD, LU, etc.).
This position is open to all candidates.
