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We are seeking an experienced Software Team Leader to lead the design, implementation, and optimization of our graph compiler key backend functionalities. You will own and drive the development of compiler infrastructure that transforms high-level computational graphs into efficient, hardware-optimized execution flows. This role combines deep technical leadership with people management responsibilities.
Responsibilities:
Take full ownership of key components within the graph compiler backend. Lead, mentor, and grow a team of talented software engineers; set priorities, review designs, and ensure timely, high-quality delivery. Drive the definition and the implementation of backend compiler architecture to support various graph IR transformations, optimization passes, and hardware abstractions. Lead the identification and implementation of compiler-level optimizations to maximize performance and efficiency of workloads on target hardware. Drive clear and transparent work planning by balancing performance goals and time-to-market considerations, fostering a proactive can-do mindset across the team. Establish best practices for code quality, testing, documentation, and continuous integration within the compiler team. Work closely with frontend compiler, runtime, architecture and hardware design teams to ensure seamless integration across the software stack.

Lead the development of Sensing SDK, a core software toolkit that integrates a broad set of computer vision, audio, and voice libraries, along with AI operators. The SDK is specifically designed and optimized for latest NPUs and DSPs - NeuPro-M, NeuPro-Nano and SensPro2 - positioning it as a cornerstone of sensing and AI platform.
Key Responsibilities:
Lead and mentor a team of software engineers developing Sensing AI SDK. Architect and implement high-performance sensing SW components for AI, vision, Audio and voice optimized for vectorize SIMD execution. Collaborate with compiler and DevOps teams to ensure efficient development and deployment. Drive technical excellence through code reviews, design discussions, and continuous improvement. Own the SDK roadmap, planning, and delivery cycles. Engage with customers to enable successful pre-sale processes, support integration and gather feedback.

we are looking for a Graduate Software Simulator Developer.
In this role, you will learn and deeply understand the AI fundamentals and create tools that simulate AI neural network processor implementation. In addition, you will perform in-depth analysis and optimization to the simulator, to ensure simulator performance and accuracy for various processors architectures.
The project is using C/C++ as main development language as well as python for AI neural network
Development platforms are Linux and Windows based.
Responsibilities:
Taking part of innovative, agile, top-notch Software organization, designing Neural Network Processor (NPU) simulator in close collaboration with the architecture, algorithms, system and hardware teams.
Design and develop simulation software solutions allowing customers to run most advanced AI networks efficiently on NPU software simulation

we are looking for a Graph Compiler Software Senior Team Leader.
As a Graph Compiler Software Manager, you will lead the development of next-generation graph compiler technology. This compiler is a cornerstone of AI software offering, empowering customers to optimize, map, and execute complex neural networks across architectures with extraordinary efficiency. You will lead a group of talented engineers and team leaders working across domains such as compiler optimizations, graph-level transformations, operator mapping, scheduling, and code generation. We are seeking a visionary and technically strong leader with passion for excellence and impact in one of the most fascinating areas of AI and deep learning.
Key Responsibilities:
Lead the design and implementation of innovative graph compilation flows for AI workloads, from high-level optimizations to hardware-specific backends. Build and guide a strong, innovative, and results-driven compiler team that thrives on solving complex technical challenges. Collaborate with hardware architecture, VLSI, and software framework teams worldwide to ensure seamless integration and maximum performance. Lead the end-to-end delivery of graph compiler components while meeting aggressive KPIs. Establish and execute group planning processes to ensure timely and high-quality delivery. Provide technical and managerial guidance to team leaders and engineers. Define and drive compiler optimization strategies for AI and deep learning workloads.

We are looking for a hands-on leader to head a small team that builds simulation models for our next-generation AI hardware and DSP. Modeling is done in several layers, from cycle-accurate, bit-exact block level modeling, to event-driven full IP system flows.
Your groups mission is to take part in the exploration phase of a project, giving architects rapid, high-fidelity feedback so they can explore design options, and to perform algorithmic regression, detecting deadlocks, sweep parameters and features, and understand system-level impact in a quickly adapting, dynamic development environment.
Beyond pure performance modeling, youll keep a sharp eye on functional accuracy and QA, follow emerging academic and industry trends, and inject the relevant insights into the product.
You will also champion modern AI-assisted coding tools (e.g., Cursor AI, GitHub Copilot) to lift the productivity of the senior software engineers on your team and shorten iteration cycles.
Responsibilities:
Lead and mentor a team of simulation and modeling engineers; set goals, review designs, and remove roadblocks. Design and implement transactional / cycle-accurate / bit-exact / event-driven models that faithfully represent advanced AI IP blocks (Transformers, CNN accelerators, custom DMA, interconnects, power-management units, etc.). Build automated flows to sweep architectural parameters and features, collect metrics, and visualize system-level impact on performance, area, power, and bandwidth. Analyze and debug complex issues such as deadlocks, race conditions, and performance hotspots; deliver concise root-cause reports and actionable recommendations. Collaborate daily with architecture, VLSI, compiler, and firmware teams to translate new algorithms and hardware ideas into model requirements and specifications. Own accuracy and QA of the simulation stack: golden-model alignment, coverage tracking, regression health, and release sign-off. Continuously survey academic papers and industry trends, extract meaningful insights, and propose innovative modeling techniques or architectural directions. Promote the adoption of AI-powered development tools to accelerate coding, code-review, documentation, and test generation across the team.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

Research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

Developing models for simulations and performance testing, analysing the results and development of future HW and SW.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are looking for an HPC and AI Data Center Engineer to join the networking cloud solutions HPC/AI Infrastructure team. We are focused on building supercomputers and HPC clusters based on groundbreaking technologies. We are looking for a lab manager, be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and GPU computing. Take part of building large-scale compute and Deep Learning software and hardware platforms, work together and support many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions.

What you will be doing:

Plan and build complex cluster and supercomputers in various of data center and labs.

Rack stack and cable management to ensure efficient use of space and easy maintenance.

Ensure data centers and labs power and cooling efficiency while optimizing rack space utilization.

Data centers and labs daily operation and support.

Installations for variety of infrastructure and solutions - Cloud, VMs, Storage, Network, HPC and AI.

Perform troubleshooting - network, optic cabling, bare metal, operating system.

Support Research & Development activities.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you'll be doing:

Lead the end-to-end execution, tracking, and convergence of chip-level CDC and RDC for complex SoCs across all IPs and partitions.

Plan and orchestrate CDC/RDC signoff: define methodology, scopes, run plans, constraints, and acceptance criteria.

Run and maintain CDC/RDC flows and rule decks, including multi-mode, multi-clock, and hierarchical signoff.

Triage violations efficiently: root-cause to RTL, constraints, tool setup, or IP models; prioritize and drive fixes to closure with owners.

Verify reset architecture and RDC robustness (reset domain intent, release sequencing, glitch detection, fanout).

Author and review CDC/RDC constraints, waivers, and justifications; ensure auditability and signoff quality.

Automate runs, report parsing, dashboards, and KPIs for closure tracking using scripting and data tooling.

Partner with RTL, DV, DFT, STA, PD, and Architecture to align fixes, manage ECOs, and protect CDC/RDC quality during late design changes.

Define and enforce signoff gates; communicate progress and risks with clear metrics and issue tracking.

Continually improve methodology and training to prevent recurring CDC/RDC issues and accelerate convergence.

we are seeking an experienced Product Owner to lead operational aspects of our SaaS platform. This role focuses on ensuring supportability, reliability, and scalability across the platform, collaborating closely with R&D and Cloud Operations teams. You will drive requirements and priorities for monitoring for all aspects of operations and cost, tenant management, tools for support, and onboarding. This role is critical to meeting our clients service level expectations for a modern SaaS offering to handle all aspects of Financial Crime and Compliance management.
How will you make an impact?
Embed auditing, compliance, and security controls into operational workflows to reduce risk and ensure regulatory adherence.
Deliver onboarding tools and administrative consoles that accelerate tenant setup and improve operational efficiency for internal support teams.
Implement deployment automation and configuration migration processes that shorten release cycles and minimize errors.
Optimize resource utilization and cost efficiency through measurable KPIs and proactive capacity planning.
Achieve high availability and disaster recovery objectives by validating performance testing strategies in collaboration with R&D and Cloud Ops.
Establish robust monitoring, logging, and troubleshooting capabilities that enhance platform reliability and reduce mean time to resolution (MTTR).

As a Senior Software Engineer in the GPU Networking Architecture team, youll lead advanced development and POC efforts for AI infrastructure solutions. You'll be collaborating with experts across distributed AI, deep learning, networking OS, virtualization, storage, and more. Come and join us for the cutting edge in GPU Networking!

What youll be doing:
Drive advanced development and POCs for AI infrastructure solutions in cutting-edge AI networks, integrating innovative software and hardware.
Demonstrate team architectural concepts with larger NVIDIA AI software stacks.
Work closely with various groups within NVIDIA to bring AI network technologies to reality, including GPU and Switch HW and SW teams, Product as well as fellow architects.

As a Senior Software Architect in the Accelerated Computing System and Software team, you will define Software Defined Networking (SDN) architectural solutions and be part of a team of specialists who span across numerous technological fields related to the modern data center, such as distributed AI and deep learning systems, High Performance Computing (HPC), Networking Operating Systems, Virtualization, Storage, and more.

What youll be doing:

Define system and software architecture for Software Defined Networking (SDN) of ground breaking emerging AI and HPC networks which involves innovative software and hardware.

Be an active member in setting the use-cases and metrics for Monitoring Complex High-speed Networks Control-plane.

Work closely with various groups within NVIDIA to bring AI and HPC network technologies to reality, including GPU and Switch HW and SW teams, Product as well as fellow architects.

We seek a highly motivated and experienced System Architect specializing in Data-Center, AI Fabric, and Ethernet Networking to join our team of experts and help shape the future of high-performance ML/AI computing. You will have the opportunity to work on some of the most pioneering technologies and help drive the innovation of our next-generation networks. You will play a key role in defining end-to-end solutions, networking protocols and features, interworking with orchestration systems, and help address new business opportunities in exciting areas. Our Architects also represent us in open-source projects, technical conferences, and standard development organizations.

What you'll be doing:

Explore new technologies and end-to-end solutions for our Ethernet Networking Platforms.

Be familiar with data-center and AI fabric network topologies, AI/ML clusters operation and network usage, as well as with the Ethernet Switch platforms' design and characteristics.

Define robust architectures and technical requirements for network operating systems and end-to-end solution offering for AI/ML workloads' needs and highly performing network operations.

Lead the work with R&D and Validation teams, providing technical guidelines and close support and thorough reviews for detailed designs and test plans.

Collaboration with architects across various fields, including Chip Design, Firmware, Hardware Platforms, and System teams.

Close work with product marketing, program managers, and account managers to ensure the successful execution of projects.

Support engagements with key customers, issue patents, publish white papers and blogs, and be proactive in technical forums and industry working groups.

Promote innovation through the design and implementation of Proof-of-Concept (PoC).

The Networking Application Engineering team is looking for a motivated, experienced Senior Hardware Engineer to join us in supporting groundbreaking network technologies. In this role, you will have a significant impact on both our business and the technology ecosystem, working closely with customers and R&D teams to shape the future of supercomputing and networking.

What youll be doing:

Support the integration of our latest Network Interface Cards (NICs) with major cloud providers.

Assist with the deployment of new supercomputer technologies and data centers.

Build and maintain customer trust by understanding and addressing their needs.

Collaborate closely with R&D teams to develop and refine features based on customer requirements.

Lead efforts to resolve complex and high-profile customer issues.

Provide constructive feedback to engineering and marketing teams regarding product requirements.

Were seeking passionate professionals who thrive in a fast-paced, creative, and collaborative environment - those who want to be part of the next generation of airspace security innovation.
Responsibilities:
Design and implement sophisticated digital signal processing algorithms for applications in areas such as signal processing and wireless communication physical layer.
Collaboration with a multi-disciplinary teams (algorithm engineers, systems engineers, SW engineers, etc.) to design and integrate challenging DSP algorithms for wireless systems.
Enforce high standards for software architecture, ensuring the DSP codebase is scalable, modular, testable, and maintainable.
Conduct thorough performance analysis and optimization of existing DSP systems, identifying opportunities for improvement.
Write clean, efficient, and maintainable code for production systems.
A proactive approach to innovation and a passion for developing high-quality products.

we are looking for a Senior System Engineer.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication protocols.
Define requirements and guide multi-disciplinary teams (SW, Algorithms, DSP, and FPGA) through implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like MATLAB, Python, Excel, and other log analysis software.
Create and maintain comprehensive system-level documentation.
Gain a deep understanding of the full system to guide and support testing and validation teams, helping define methodologies, tools, and coverage strategies.