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we are a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance. We are seeking an experienced Component Engineer to join our Engineering organization and lead component engineering activities across RF, electronic, mechanical, and material domains. In this role, you will be responsible for component selection, qualification, lifecycle and obsolescence management, alternate part approval, and supplier engagement. You will work closely with Engineering, Procurement, Quality, Manufacturing, and Program Management teams to ensure component availability, reliability, compliance, and cost-effectiveness throughout the product lifecycle. Key Responsibilities Manage engineering component databases and approved part catalogs. Lead component selection, qualification, approval, and lifecycle management activities. Evaluate and support RF, electronic, mechanical, and material components for development and production programs. Review and approve new component requests in accordance with company standards. Monitor obsolescence and supply chain risks and develop mitigation plans. Qualify alternate components and support engineering change. Interface with suppliers to resolve technical issues and obtain qualification documentation. Perform technical assessments covering performance, reliability, compliance, availability, and cost. Support failure analysis, root cause investigations, and corrective actions. Collaborate with cross-functional teams including R&D, Quality, Procurement, Operations, and Manufacturing.

You will guide and mentor our electrical technicians and manage subcontractors, vendors, and suppliers to ensure high-quality, on-time delivery. The role requires deep experience working with EO system electronics, including board-level definitions, mixed-signal design, high speed cameras pipeline, and complex system integration. Your leadership will directly impact on the reliability, performance, and operational capabilities of our tactical EO products.



Responsibilities

Lead end-to-end electrical design of complex EO systems, from concept to validation
Define board-level architecture across analog, digital, power, and high-speed domains
Oversee PCB design and collaborate with external partners and manufacturers
Drive bring-up, debugging, and validation of mixed-signal boards
Perform root-cause analysis and resolve complex electrical issues
Work cross-functionally to ensure seamless system integration
Develop and execute test plans at board and system level
Manage component selection (BOM), vendors, and suppliers
Mentor technicians and support lab activities

We are seeking for a passionate and skilled Validation Engineer to join our core R&D team. As a Validation Engineer, you'll play a critical role in ensuring the quality, reliability, and performance of our state-of-the-art quantum control systems. You will design, develop, and execute validation plans for complex hardware-software systems, contributing directly to the advancement of quantum technologies.
This role is ideal for engineers with good programming skills, a strong technical culture, and a passion for working at the intersection of software, hardware, and quantum science.
Main Responsibilities:
Design and Implement Validation Methods: Design, implement and execute comprehensive validation test plans for our quantum control platforms and solutions
Automated Tests and Automation Frameworks: Contribute to the development of automated testing infrastructures to streamline validation processes and implement system tests based on the defined test plans
AI/ LLM Tools: Apply AI/LLM tools to accelerate test code generation and continuously improve the validation toolchain, driving measurable gains in engineering productivity
Data Analysis: Collect, interpret, and document data from system tests/experiments to assess system performance and identify areas for improvement
System Debugging & Troubleshooting: Identify, reproduce, and analyze issues across system components with other engineering teams
Collaborate Across Teams: Collaborate closely with R&D and product teams to define test coverage and quality acceptance criteria
Release & Quality Assurance Process: Participate in regression testing and CI/CD for new feature rollouts and product releases
Maintain and Improve Test Setups: Oversee the setup, calibration, and enhancement of test equipment and environments.

We are seeking an experienced Signal/Image Processing and Machine Learning engineer to join our team. The role focuses on developing innovative, real-time deep learning and signal processing solutions for new sensing and imaging systems, including video restoration. You will be part of an interdisciplinary team developing technologies that will shape future Apple products.
Description
Algorithm and model development:
- Design, implement, and optimize signal processing and machine learning models for sensing and imaging tasks, including video restoration.
- Develop and validate models using real sensor data, simulated data, and public datasets.
- Prepare, filter, process, and analyze large-scale datasets to train and evaluate models.
- Analyze your algorithm's results and benchmark them against leading methods, and theoretical bounds.
- Optimize models for real-time performance, low latency, and resource efficiency on-device.

Sensing and research:
- Develop algorithms that combine classical signal processing with learned models to extract robust information from sensor data.
- Investigate efficient architecture patterns (lightweight backbones, attention mechanisms, recurrent designs) suitable for real-time, on-device inference.
- Explore how algorithmic approaches can mitigate artifacts and limitations of new sensing and imaging systems.
- Stay current with recent advances in signal processing, computer vision, and machine learning.

Collaboration and technical leadership:
- Work closely with ML researchers, SW, HW, sensor, and architecture engineers to translate research ideas into robust models and practical, shipping systems.
- Provide technical guidance and mentorship to junior engineers, and help shape the team's technical direction.

Responsibilities
- Own the end-to-end development of real-time algorithms, from concept and prototyping through validation and deployment.
- Define evaluation methodology, metrics, and failure analysis processes for sensing and imaging algorithms.
- Drive trade-off decisions among accuracy, latency, power, and memory across algorithm, HW, and system constraints.

We are seeking an experienced Signal/Image Processing and Machine Learning engineer to join our team. The role focuses on developing innovative, real-time deep learning and signal processing solutions for new sensing and imaging systems, including video restoration. You will be part of an interdisciplinary team developing technologies that will shape future Apple products.
Description
Algorithm and model development:
- Design, implement, and optimize signal processing and machine learning models for sensing and imaging tasks, including video restoration.
- Develop and validate models using real sensor data, simulated data, and public datasets.
- Prepare, filter, process, and analyze large-scale datasets to train and evaluate models.
- Analyze your algorithm's results and benchmark them against leading methods, and theoretical bounds.
- Optimize models for real-time performance, low latency, and resource efficiency on-device.

Sensing and research:
- Develop algorithms that combine classical signal processing with learned models to extract robust information from sensor data.
- Investigate efficient architecture patterns (lightweight backbones, attention mechanisms, recurrent designs) suitable for real-time, on-device inference.
- Explore how algorithmic approaches can mitigate artifacts and limitations of new sensing and imaging systems.
- Stay current with recent advances in signal processing, computer vision, and machine learning.

Collaboration and technical leadership:
- Work closely with ML researchers, SW, HW, sensor, and architecture engineers to translate research ideas into robust models and practical, shipping systems.
- Provide technical guidance and mentorship to junior engineers, and help shape the team's technical direction.

Responsibilities
- Own the end-to-end development of real-time algorithms, from concept and prototyping through validation and deployment.
- Define evaluation methodology, metrics, and failure analysis processes for sensing and imaging algorithms.
- Drive trade-off decisions among accuracy, latency, power, and memory across algorithm, HW, and system constraints.

We are looking for a hands-on engineer to join our Platform Architecture post-silicon team. This team analyzes and tunes the performance and power of Apple Silicon for the Mac, and takes the learnings and measurements to drive SoC architecture change for future chips. If you work comfortably across the hardware/software stack, and the idea to bring up brand-new chips that just arrived from the fab does not scare you but gets you excited, when we would like to hear from you.

You will join a multidisciplinary team of architecture, silicon design, and system software engineers driving the performance and energy efficiency of Apple SoCs. The work spans application software, system software, SoC architecture, and microarchitecture, and sits at the intersection of measured silicon behavior and forward-looking architecture definition. You will build a deep understanding of how current and planned Apple products behave end to end, and use it to influence both hardware and software direction.

Responsibilities
Tune and define SoC memory and fabric performance state controllers on unreleased silicon, and propose improved control and observability mechanisms for future generations.
Plan and execute architecture studies that drive performance and energy-efficiency decisions for future SoCs.
Build tools, workflows, and automation for repeatable analysis of simulated and measured data, including terabyte-scale traces from prototype devices.
Architect hardware features that improve workload characterization and enable robust online control of power and performance.
Debug complex interactions between system software and SoC hardware.
Assess the feasibility of future use cases, SoCs, and products.
Communicate findings across chip design, architecture, software, and system teams to enable data-driven decisions.

As a member of our ML group, you will design, prototype, and ship agentic GenAI systems used by chip design engineers to accelerate their day-to-day workflows. We are looking for a machine learning engineer who is energized by taking LLMs from "promising demo" to "depended-on tool": designing the agent loops, retrieval pipelines, and evaluation frameworks that make this transition real. Success in this role means agents that meaningfully shift how our customer teams work, backed by measurements you trust.

You will join a growing team of ML and software engineers building GenAI solutions for chip design teams. In this role, you will:

Design and build agentic systems featuring multi-agent coordination, long-horizon reasoning, tool use, and planning frameworks.
Develop end-to-end solutions, including domain-specific agents and high-performance retrieval pipelines spanning diverse data sources.
Partner with subject-matter experts on the customer teams to translate their workflows and rules of thumb into concrete agent assignments, prompts, tools, and guidelines.
Build the evaluation backbone for our agents: define success measures, curate offline golden sets, and instrument online telemetry to power feedback loops that drive fast, safe iteration with real cost and quality control.
Drive prompt engineering, model selection, and lightweight model adaptation as the workloads demand.
Collaborate closely with software engineers on the team to productionize your work, and with researchers and customers to shape what we build next.
Stay current with the rapidly evolving agentic and LLM landscape and bring promising techniques into our products with good engineering judgment.

As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!


As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise ).

As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!

As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )

This role is for a analog IP lead who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of silicon development from definition to high quality production.


Specifying requirements and circuit architecture for analog blocks and sub-blocks of an IP, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, work with chip design teams, system HW and SW design teams, ATE PE.

You will be responsible for:
Develop the circuit design of the IPs analog blocks following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.
Work and collaborate with other designers in the group to deliver results.
Work with FE & BE teams to ensure quality analog integration.
Work with power/performance and functional verification team to define and validate operation sequences.
Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
Work with post silicon validation groups to ensure the design meets the power/performance targets.

we bring connectivity and intelligence to everyday products and packaging; things previously disconnected from the internet of things. our platform combines cloud services and iot pixels, computing elements that can power themselves by harvesting radiofrequency energy. this revolutionary mixture of cloud and semiconductor technology is used by some of the worlds largest brands, food, and pharmaceutical companies to change how we make, distribute, sell, use, and recycle products. our investors include amazon, verizon, ntt docomo, qualcomm, pepsico, and softbank vision fund 2. join us and help pave the way for the new iot.
our TEST & product team is responsible for keeping a target of a very aggressive cost limit of the production testing (wafer sort) while performing comprehensive testing of all the units functionalities. this involves:
development of the tests using the teradyne uf tester.
development of unique and advanced TEST hw.
monitoring and analyses the production data.
fa (failure analysis) when issues are discovered.
innovative dft (design for testability) with the design team.
responsibilities:
development of wafer sort TEST programs through a close relationship with the system team.
development of the future products dft and dfm through close collaboration with the design team.
improvement of the production data analysis and reports through close relationships with the cloud and data teams.
working with the external abroad TEST houses.
decision-making based on massive data analysis (pass criteria, improvements of the tests, identification of failures).
integrate new and innovative testing methods for a new technology sector.
specify and work with external vendors for the tester hw (probe-card and load-board).
specify and work with external vendors for the htol hw, TEST program.

the company was founded by the team that invented one of the technologies at the heart of 5g. their next vision was to develop an iot sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnect from the iot. this revolutionary mixture of cloud and semiconductor technology is being used by some of the worlds largest consumer, retail, food and pharmaceutical companies to change the way we make, distribute, sell, use and recycle products.
our investors include softbank, amazon, alibaba, verizon, ntt docomo, qualcomm and pepsico.
we are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. this position involves building and maintaining a complex verification environment, and defining and executing a TEST plan. in this role, you will be leading all aspects of verification and will have a critical impact on the company's r&d path.

the company was founded by the team that invented one of the technologies at the heart of 5g. their next vision was to develop an iot sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnect from the iot. this revolutionary mixture of cloud and semiconductor technology is being used by some of the worlds largest consumer, retail, food and pharmaceutical companies to change the way we make, distribute, sell, use and recycle products.
our investors include softbank, amazon, alibaba, verizon, ntt docomo, qualcomm and pepsico.
we are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. this position involves building and maintaining a complex verification environment, and defining and executing a TEST plan. in this role, you will be leading all aspects of verification and will have a critical impact on the company's r&d path.
responsibilities:
define and implement robust sv/uvm verification solutions, including TEST benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating mix-signals SOC simulation environment using verilog, matlab, hw/sw co-simulation and lab integration.
work closely with digital design, analog design, software, back-end, sw and system teams to understand the functional, power and performance goals of the product and ensure its quality.