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Lead the functional sign-off for complex FPGA designs by architecting scalable, reusable UVM-based verification environments.
You will build the essential infrastructure that empowers FPGA designers to efficiently and accurately verify their own modules.

Key Responsibilities:
* Architecture: Build and maintain advanced simulation environments from scratch using UVM and SystemVerilog.
* Strategy & Coverage: Develop comprehensive verification plans to drive the team toward 100% functional and code coverage closure.
* CI/CD & Automation: Architect robust automated regression testing environments and integrate them into CI/CD pipelines (e.g., Jenkins).
* Tool Expertise: Serve as the internal authority for EDA tools (like Questa) and manage high-performance simulations.
* Debugging: Perform deep root-cause analysis on complex failing tests and hardware logic.

our companys innovative processors are designed into the advanced cellular systems of most tear-1 carriers .
We are looking for an experienced and creative Verification Engineer to join our Processor Verification Team.
In this role, you will be responsible for verifying the core units of our next-generation processors. You will work closely with the architecture and design teams to ensure functional correctness through advanced verification methodologies, taking ownership of verification environments from planning to coverage closure.

our networking product engineering team is looking for a TEST development engineer. the position combines an understanding of hw and sw to provide stable, efficient, smoothly running production tests, to enable high availability, while ensuring the quality of the products being shipped to customers.
what youll be doing:
design and develop automated tests for networking switches while working closely with the hw, asic, and sw engineering teams to achieve a reliable TEST with high coverage
exposed to various aspects of design, dft, and TEST of nvidia's next-generation network products
take a significant part in the definition and development of tests from the development level to the final TEST of network-systems
working with overseas manufacturing teams to increase yields, TEST coverage, and capacity, and reduce production costs

looking for an excellent senior system Validation engineer!
networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, Big Data, and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry.
what you'll be doing:
TEST verification and validation (both hw and sw).
maintain products quality by improving TEST stability, coverage, design, and manufacturing process in mass production.
execute tests in different scopes such: as regression, performance degradation, functional, and security; report the progress of testing and provide summary reports of the activity.
troubleshooting and streamlining/optimizing our testing procedures.
support mass production matters.
debugging production bugs and solving them.

our eyeq platform group (epg) is seeking a motivated formal Verification engineer to join our team and contribute to development of hardware verification environments.
this position offers an opportunity to apply formal methods to verify the correctness of various complex digital systems.
this is an exciting opportunity to join a team of talented engineers, working cutting edge technologies in the field of autonomous vehicle. what will your job look like:
be the owner of formal verification environment from first draft to sign-off stage
apply formal methods to verify the correctness of various complex digital systems
work with hw architects/designers to define assumptions, rules and cover properties
help define the formal verification methodology and environment to be applied by the team
explore new formal methods and tools
work with tools like cadence jaspergold, verisium manager, xcelium, indago
analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
develop generic formal blocks/functions of commonly used logic, to be later used off the shelf

architect end-to-end system validation strategies for new hardware platforms.
define TEST coverage and validation methodologies.
collaborate with hardware, software, qual and QA teams to align on product requirements and TEST coverage plans.
lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.
analyze TEST data to identify root causes, guide debug efforts, and improve validation coverage.
provide technical leadership and mentorship across multidisciplinary teams and represent system TEST considerations in architecture and design reviews.

we are looking for a senior formal Verification engineer for our networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking nic technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies. our nic team delivers world class cpu interface and offload solutions for hpc, data -center, network, and Storage markets. we micro-architect, verify, and deliver the best and most widely used high bw ethernet and ib nics in the industry. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of nvidia's core technology.
you will learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.

our company networking division is looking for an excellent verification and validation system product engineer! our networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. our products optimize data center performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of markets including high performance computing, enterprise, data centers, cloud computing, Big Data, and web 2.0. we are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. 
what you'll be doing:
define TEST strategy
design, implement, and execute validation plans for the infrastructure system.
write efficient, maintainable, and high-quality unit tests for new features and existing codebases
automate infrastructure testing processes to improve validation efficiency.
identify potential bottlenecks, vulnerabilities, and failure points within the infrastructure and recommend corrective actions.
enhance validation efficiency through continuous monitoring and optimization.
troubleshooting and streamline/optimize our testing procedures.

we are now looking for best-in-class senior chip design Verification engineer to join our outstanding network adapter silicon group, developing the industry's best high-speed smart communication devices, data processing unit (dpu), delivering the highest throughput and lowest latency! come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. 
what you'll be doing:
work in a verification team which develops some of the networking silicon core units.
build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to performance.
gain a strong understanding of chip micro-architecture and features, and develop the verification environments.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.

what you'll be doing:
own the responsibility for delivering networking features and their verification aspects.
define, develop and maintain verification infrastructure and regression tests suites - make TEST suites robust, maintainable and easy portable.
work with continuous integration system, regression tools, automate builds, run TEST suites and analyzing results.
innovate! bring nvidia product to next quality level

our networking hw qual teram is looking for a system electrical characterization and Validation engineer, to take part of networking system validation and characterization efforts of different platforms and products. you will be a part of a team working on groundbreaking technology. we are in need of hardworking and motivated engineers ready to define and lead validation activities. do you have analog approach, have passion for lab work, data analysis and post-si hands on problem solving? we will be happy to have you on our team!
we are looking for a skilled and experienced engineer with a focus on system electrical validation to join our engineering team in yokneam, israel. as part of this role, you will play a crucial role in ensuring the quality of our advanced products. you will collaborate closely with phy design, system architecture and company wide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.
what youll be doing:
create and implement electrical validation plans for new products.
analyze and interpret validation results to identify potential issues.
collaborate with design and architecture teams to define required validation and optimize and solve electrical issues.
design and develop TEST scripts and frameworks to automate validation processes.
work closely with software and firmware teams to ensure seamless integration.
provide technical expertise and guidance to junior team members.
maintain accurate documentation of validation activities and results.

we seek a V&V Engineer with a strong background in validation to join the interconnect validation team. this position will be part of the product engineering team that crafts and integrates software tests for our company networking products into the production lines. you will handle various projects across teams, complete new lab setups, review the hw design, build validation plans, implement automated tests, perform manual scenarios, and report bugs. are you passionate about attention to detail and taking ownership of end-to-end validation for our interconnect products? join our team and bring your expertise to life!
what you'll be doing:
collaborate with multi-functional teams across engineering, software development, and hw to identify TEST requirements
define and build setup topologies for appropriate product coverage
build a validation plan, complete, and integrate tests for the new interconnect products to address the business needs
debug sw & hw failures during the validation and take action to address it
report bugs found during validation, assist with reproduction, and debug to understand the root cause, and follow up to close it
deploy the product validation into the nightly automation tests and track during the daily meeting

we are looking for a talented, fast learner, and highly motivated chip design - Verification engineer. as a member of our chip design team, you will be responsible for verifying portions of the design, of a high performance and low power chip, focusing on such tasks as micro-architectural understanding, verification environment coding and logic debug. this position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. we have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
what you'll be doing:
as a member of our chip design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of chip design related logic. day to day tasks include:
understand and analyze uarch definitions.
implement verification components to verify rtl meets specifications.
collaborate with our rtl, arch and uarch teams.
work on logic related to switch design.

we are looking for a system /network TEST engineer to join our end-to-end cloud solution team. you are going to be part of the e2e verification team with the main goal of testing and be part of defining the most sophisticated ethernet/infiniband nic and switch features and topologies, which build fast enablement for the nvidia products to meet growing market demands. the ideal candidate will engage in testing and defining of networking industry-leading systems and will bring with him an ability of the fast learning of new features, technologies, and protocols.
what you'll be doing:
contribute to design review and product features requirements under the whole ethernet/infiniband nic & switch portfolio and ai network
design and build setup topologies for appropriate product coverage with an emphasis on an emulation of customer large scale / complex environments
design requirements, for testing automation team, and implement tests for the new features, as part of nvidia growing network switch and adaptors division
lead innovation approach by prepare and deploy different poc activities, based on the growing field demands
generate comprehensive TEST reports during release execution procedure, assist with reproduction and debugs complex customer use cases, with determination of the issue root cause, be an engineering pic for the full verification cycles of the customer use cases fixes provided by r&d team
execute end-to-end TEST scenarios in different scopes: regression, performance, functional and scale; report the progress of testing and provide summary reports of testing activity

collaborate with software, architecture, product, and DevOps teams to define TEST requirements, coordinate releases, and deliver high-quality products.
take end-to-end ownership of features: develop TEST plans, implement, and fully automate testing (primarily in Python ).
design, build, and maintain automated TEST scripts and frameworks.
validate software functionality and performance through system -level and integration testing in Linux -based and virtualized environments.
analyze TEST results, file bugs, track issues to closure, and ensure robust solutions.
drive continuous improvement in verification flows and contribute to process and methodology enhancements.
set up, maintain, and optimize TEST environments using Linux, docker, and virtual machines.
monitor nightly regression systems, analyze failures, and provide thorough root-cause analysis across hardware, os, and software layers.