דרושים » מדעים מדוייקים » Verification Engineer, Nitro Team

We're looking for Electrical Engineering graduates to join the Pre-Silicon Verification Team based in Haifa.

As a Junior Pre-Silicon Verification Engineer, you'll work at the heart of chip development, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production.
IO verification team will expose you to the most advanced technologies , as we lead the market with our leaving devices - youll soon have to expertise most advance protocols

A day in the life
In this role, you'll engage in pre-silicon verification work that connects every phase of our product development journey- from initial product definition through firmware and software development.
You'll collaborate with hardware designers, software engineers, and cross-functional teams to validate complex semiconductor architectures and protocols.
Your days might include developing and executing verification test plans, analyzing simulation results, troubleshooting design issues, and participating in design reviews.
You'll work with advanced verification methodologies and tools, gaining exposure to cutting-edge technologies that define the next generation of cloud infrastructure.

We are hiring a Manager Design Engineer to help architect and deliver the connectivity silicon powering the world's largest AI clusters. You'll own design execution on complex blocks across our purpose-built products, working at the cutting edge of PCIe, CXL, Ethernet, and emerging rack-scale interconnect technologies.

This is a high-impact technical role at a hyper-growth company. You'll partner closely with architecture, verification, DFT, and physical design teams to take features from spec to silicon, while contributing to the design methodology that scales with our roadmap. If you want to ship silicon that defines AI infrastructure, this is the team.

Key Responsibilities

RTL Design & Implementation
Own RTL design for assigned blocks from microarchitecture through synthesis sign-off.
Develop high-quality, synthesizable Verilog/SystemVerilog with strong attention to PPA.
Drive design reviews, lint, CDC, and timing closure activities to silicon-ready quality.

Cross-Functional Execution
Partner with architecture to translate specifications into implementation-ready microarchitecture.
Collaborate with verification on testplans, coverage closure, and bug triage.
Work with DFT and physical design teams on scan, BIST, floorplanning, and timing closure.

Technical Leadership & Quality
Mentor junior engineers and contribute to design methodology, scripts, and best practices.
Debug complex pre-silicon and post-silicon issues across RTL, gate-level, and emulation environments.
Drive structured, data-driven design decisions in support of aggressive tapeout schedules.

Required Emulation Verification Tech Lead, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Lead, plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.

Required Senior Emulation Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.

As a System Verification Software Engineer, you will join a unique team that works at the heart of chip development, at the HW/SW boundary, collaborating across teams to ensure our semiconductor platforms meet the highest standards before they reach production, as we lead the market with our cutting-edge devices.
Youll be part of a team that verifies Graviton chips across emulation, silicon, and AWS production fleets-developing the tests, automation, and debug tooling that give us confidence our features function correctly on real hardware.

Key job responsibilities
* Verify and validate Graviton chips in emulation, silicon, and post-production.
* Develop tests that ensure our features function as intended.
* Build automation and debugging tools for silicon regressions and bring-up.
* Collaborate with hardware design and software teams to identify, analyze, and resolve design issues and verification gaps.
* Debug failures across diverse platforms (emulation and silicon).

Our Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of our future AI and deep learning HW accelerators.
This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like:
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.

Required ASIC Design Verification Engineer, Digital Signal Processing
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will define and execute the verification strategy for high-speed Physical Layer (PHY) digital blocks. This role focuses on the functional and mathematical verification of complex DSP algorithms, digital-analog boundaries, and signal processing logic. This position requires a strong technical foundation in communication theory, fixed-point arithmetic, and mixed-signal co-simulation.
Responsibilities
Verify RTL implementations against high-level architectural reference models (MATLAB, C++, or SystemC) using bit-exact and fixed-point verification methodologies.
Verify the stability, tracking capability, and convergence of adaptive equalization loops (FFE, DFE) and timing recovery systems under varying channel impairments.
Model and verify the functional interface between Digital DSP blocks and the Analog Front End (AFE) using Real Number Modeling (RNM) or SystemVerilog-AMS.
Design, implement, and maintain scalable UVM-based simulation environments, SystemVerilog Assertions (SVA), and functional coverage metrics for digital signal processing blocks.

We are looking for talented engineers to help us develop the semiconductor platform which is based on revolutionary architecture.
Take part in the development of cutting edge products within disruptive system architecture. Youll have the opportunity to work on the technologies that power the worlds largest Cloud provider, within a dynamic, open, and fast-paced environment. Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world.

Exciting opportunity to join Amazon in developing its next generation products for the cloud market.
We are looking for talented people to join the team and help us technically lead the challenges of the next decade.
In this job you will be exposed and learn wide range of expertise such as: C++ programing, hardware design, data mining, Verilog simulations, working with various high end test equipment and more
If paving new roads on edge of technology within a strong and vibrant team is what you seek, your place is with us.

As we expand our presence in Israel, we're seeking a talented Senior Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.

As a Senior Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.

Key Responsibilities

Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks.
Develop and maintain System Verilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing.
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified.

Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process.
Drive designs toward 100% verification closure through comprehensive test development.
Contribute to verification methodology improvements and best practices.

Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle.
Apply analytical skills and debugging techniques to solve intricate verification challenges.
Collaborate effectively in a fast-paced, team-oriented R&D environment.

We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of dynamic verification environments planning for units and modules.

Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.