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Were looking for a Senior Data Engineer in the Data Collection Ingest team to contribute to the design and coding of data ingestion services & pipelines. This role involves working as part of a team that handles millions of requests per minute across multiple servers, and is responsible for a wide-range of data pipelines, processing billions of events each day.

So, what will you be doing all day?

Your role as Data Engineer of the Ingest Data Collection team means your daily responsibilities may include:

Design, code and manage end-to-end data ingestion pipelines, both online and offline.
Take charge of developing & maintaining modern data infrastructure, while implementing best practices for building data pipelines.
Be responsible for high-scale ingestion services, solving challenges of availability, reliability, and scalability.
Run the production environment by monitoring availability and taking a holistic view of system health and data quality.
Own data infrastructure features from design to production using industry best practices with focus on quality and delivery.
Lead design & decision-making processes of the team.
Solve diverse complex problems of scale, performance and business logic.
Collaborate with product managers and other team leaders to plan, nurture, and implement an efficient and effective development process.
Continuously learn and evaluate new technologies in the everlasting effort to perfect our products
Perform code reviews, evaluate implementations, and provide feedback about potential improvements.
Improve your skills, learn from and mentor top-notch engineers and enrich other team members.
Have lots of fun!

As an AI Engineer , you will be a key player in building our new AI platform, AI Studio. This platform aims to provide users with instant answers to complex market research questions, generate world-class reports, and create live, interactive, and powerful dashboards. Our goal is to reduce the complexity and time-to-insight for our users, helping them streamline their market tasks and achieve automation that drives real value.

So, what will you be doing all day?

Design and develop LLM-based intelligent agents that can handle complex market research queries.
Utilize LangGraph and other frameworks to create state of the art AI agents that integrate various tools and data sources.
Implement integrations that allow agents to take automated actions on behalf of users, streamlining workflows and reducing overhead.
Collaborate with product, data, and UX teams to ensure that AI solutions are aligned with user needs and business goals.
Continuously evaluate and improve the performance of AI models to ensure high-quality and data-driven results.

Were looking for a Data Engineer to join our Data Labs (DL) department, which specializes in professional services for our super-premium customers. This role will report to our DL (Datalabs) Data Science Team Manager in the R&D.

As part of this role, you will create and support a complex data model pipeline that helps analyze the petabytes of data we receive from various sources, and research and develop new features and capabilities for our product solutions

As a data engineer in the Datalabs team, you will work on the very core of the company. Part of your role will be to create processes that help turn raw data into usable metrics and leverage AI models and statistical algorithms to support out-of-the-box requests from customers who want custom data labs. The Datalabs departments business-oriented nature also means you will be supporting a team of analysts and data scientists who interact directly with customers. Together with them, you will translate the voice of these customers into best-in-class data labs.

So, what will you be doing all day?

Building and maintaining our big-data pipelines
Take a major part in designing and implementing complex high-scale systems using a large variety of technologies
Be part of a team with smart and motivated engineers, and data scientists, to collaborate on the planning, development, and maintenance of our products
Implement solutions in the AWS cloud environment, and work in Databricks with PySpark

This is not your typical leadership role.
If youre looking to manage tasks, run standups, and stay above the code - this position probable isnt for you.
But if you want to build systems, shape engineers, and redefine how teams operate in the age of AI - keep reading.
What were actually building
were building systems that dont just process data - they make decisions.
Real-time. At scale. Under uncertainty.
Fraud evolves fast.
So our systems, and our engineers, need to evolve faster.
This is where you come in.
What youll actually do:
Youll lead a team - but youll also build with them
Youll make architectural decisions that directly impact how the system scales and behaves
Youll own critical parts of the system - not just people
Youll turn ambiguity into direction (for both product and engineering)
Youll raise the bar: in code quality, system design, and how the team thinks
Youll embed AI into how the team works - not as a tool, but as leverage
Youll help strong engineers become exceptional

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.
As a DFT Engineer at our company, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.
Key Responsibilities
DFT Architecture & Strategy
Be part of the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support
Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards
Design and implement DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG for high-end devices
Test Pattern Development & Optimization
Generate and optimize high-quality test and debug patterns for production
Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance
Drive test coverage and quality metrics to meet stringent manufacturing requirements
Cross-Functional Collaboration & Methodology Innovation
Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR
Participate in developing and maintaining cutting-edge DFT implementation flows
Automate and improve methodologies using advanced scripting and tools.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Junior ASIC Design Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful product ownership in a new site, designing the digital blocks that sit at the heart of our most ambitious connectivity projects.
As a Junior ASIC Design Engineer, you won't just build chips - you will be part of a team defining the next generation of AI infrastructure main components. The complex digital blocks under your micro-architecture and implementation responsibilities will power the world's largest AI clusters. You will own the journey from high-level definition through RTL implementation and backend support, transforming complex logic challenges into elegant, high-performance hardware. If you thrive on solving challenging problems in deep-submicron processes and want to contribute to the digital design foundation for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Design Ownership & Implementation
Own the journey from high-level definition through micro-architecture, coding, and debug to backend implementation support
Tackle complex logic challenges and transform them into elegant, high-performance hardware solutions
Serve as the point of contact for your logic blocks, interacting with Architecture, Verification, and Backend teams
Quality Assurance & Design Optimization
Utilize industry-leading EDA tools (Lint, CDC, Synthesis, Timing, Power) and in-house quality assurance tools to ensure designs are robust, scalable, and power-efficient
Apply design techniques to meet PPA (Power, Performance, Area) targets
Contribute to design quality through verification and validation activities
Methodology Innovation & Collaboration
Participate in design methodology improvements and tool automation initiatives
Leverage AI assistance tools and contribute to in-house automation development to make engineering workflows faster and smarter
Collaborate effectively across teams to ensure seamless integration.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Junior Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.
As a Junior Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks
Develop and maintain SystemVerilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified
Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process
Drive designs toward 100% verification closure through comprehensive test development
Contribute to verification methodology improvements and best practices
Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle
Apply analytical skills and debugging techniques to solve intricate verification challenges
Collaborate effectively in a fast-paced, team-oriented R&D environment.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Junior Physical Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the backend execution and methodologies for chips that power the world's largest AI clusters.
As a Junior Physical Design Engineer, you will be a key architect of our silicon's physical reality. You won't just execute a flow-you will help establish our local execution culture and technical standards, owning the transformation of complex logic into high-performance silicon. You will drive the physical implementation journey from synthesis through signoff, ensuring our connectivity solutions meet the extreme performance, power, and area targets required for next-generation AI infrastructure. If you thrive on solving complex challenges in deep-submicron processes and want to shape the backend methodology for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Physical Implementation & Execution
Be part of the founding Backend team in Israel, playing a critical role in establishing local execution culture and technical standards
Take full responsibility for physical implementation journey including Synthesis, Floorplanning, Place & Route, and Clock-Tree Synthesis (CTS)
Own macro-level implementation with deep hands-on experience in floorplanning and complex routing
Signoff & Design Integrity
Drive final stages of design integrity, owning Timing signoff (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR)
Ensure first-pass silicon success through rigorous signoff flows and analysis
Apply Logic Equivalence Checking (LEC) and other verification techniques to guarantee design correctness
Methodology Development & Cross-Functional Collaboration
Participate in defining and refining Backend methodologies with autonomy to improve workflows and tool automation
Work closely with Architecture, Design, and DFT teams to navigate challenges of advanced process nodes and high-speed connectivity
Leverage scripting and automation to make engineering environment faster and more robust.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we are seeking a motivated Physical Design Student to join our founding local engineering team.
This is a unique opportunity to kickstart your career in the semiconductor industry. Working alongside senior industry veterans, you will gain hands-on experience in backend execution and advanced methodologies for cutting-edge chips that power the world's largest AI clusters. If you are passionate about silicon hardware, eager to learn, and thrive on solving complex engineering challenges, this role offers the perfect bridge between your academic studies and a high-impact career.
Key Responsibilities
Guided Implementation & Learning
Partner with and learn from senior engineers to support the physical implementation journey, including synthesis, floorplanning, Place & Route (P&R), and Clock-Tree Synthesis (CTS)
Assist in macro-level implementation and develop hands-on skills in complex layout routing
Participate in deep-submicron process challenges under close professional mentorship
Signoff & Design Integrity Support
Assist in running engineering checks for design integrity, including Static Timing Analysis (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR)
Learn to apply Logic Equivalence Checking (LEC) to help guarantee design correctness
Gain exposure to the rigorous flows required to ensure first-pass silicon success
Scripting & Cross-Functional Collaboration
Leverage and develop scripting tools to automate repetitive tasks and optimize the engineering environment
Collaborate with Architecture, Design, and DFT teams to understand how different chip design disciplines intersect
Actively participate in team reviews and technical discussions to ramp up backend methodologies.

Were looking for a sharp and experienced Senior QA Engineer to ensure the reliability, accuracy, and performance of most critical system - COS.
In this role, youll be embedded in a fast-paced product team, designing and executing manual and automated test plans that cover everything from backend APIs to customer-facing applications. Youll take ownership of quality from day one - helping build a scalable testing culture, mentoring junior engineers, and working closely with developers and product managers to catch issues before they hit production. If you're passionate about high standards and building quality into every stage of the SDLC, this ones for you.
Who You Are
Obsessed with quality and passionate about preventing bugs, not just finding them
A team player who thrives in cross-functional environments
Analytical and curious - you ask the right questions and dig deep
Detail-oriented but also see the bigger picture
Proactive, resourceful, and always looking to improve how things are done

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Principal DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.
As a Principal DFT Engineer, you will provide technical leadership across the full DFT lifecycle-from architecture and specification through implementation, verification, and silicon bring-up. You will define and drive DFT strategy, establish robust methodologies, and lead execution to ensure high test quality and manufacturability. This role requires deep expertise, cross-functional influence, and the ability to drive DFT excellence across projects and teams.
This is a critical leadership position with high impact on first-pass silicon success and production quality for next-generation AI connectivity solutions.
Key Responsibilities
DFT Architecture & Technical Leadership
Define and own DFT architecture for complex SoCs, including Scan, MBIST, LBIST, JTAG/iJTAG, and ATPG strategies
Lead DFT planning, specification, and quality tracking across the project lifecycle
Provide technical leadership and drive DFT sign-off readiness to ensure successful tapeout
Execution Across the Full Lifecycle
Lead DFT implementation, integration, and verification at block, full-chip and chiplet levels
Own end-to-end DFT activities from specification through silicon bring-up and production support
Ensure high test coverage, robust pattern generation, and alignment with manufacturing requirements
Methodology & Cross-Functional Impact
Develop and drive scalable DFT methodologies, flows, and automation frameworks
Collaborate closely with RTL, Physical Design, STA, and Test Engineering teams to ensure design-for-test readiness
Optimize DFT integration across front-end and backend flows to improve quality, PPA, and turnaround time.

Required AI Data Engineer
About the role:
We're building the intelligence layer that lets everyone ask hard questions of our data and get trustworthy answers - in plain language, in seconds. As AI Data Engineer, you own the semantic and AI-native surface of our Snowflake platform: the governed semantic layer that defines "what a metric means," the Cortex Agents that let business users query it conversationally, and the infrastructure that keeps all of it fast, reliable, and ready to scale.
This is a builder-owner role. You'll ship the semantic models, wire up the agents, and set the standard for how analysts across the company work with data. You'll also lead the Data Analyst guild - the connective tissue that keeps our hub-and-spoke analytics model coherent as it grows.
If you're excited by the space where data engineering, LLM tooling, and analytics governance meet, this role sits right in the middle of it.
What youll Own:
Snowflake semantic layer - Own the semantic layer end-to-end as the single source of truth for metrics; design semantic models, enforce naming standards, and ensure consistent metric definitions across dashboards and AI agents.
Cortex Agents - Design and deploy conversational AI agents using Cortex Analyst and Cortex Search; tune for accuracy and safety, expose through multiple surfaces (Snowflake Intelligence, Streamlit, MCP), and build evaluation harnesses to maintain quality at scale.
Data craft (Analytics guild) - Co-lead the technical track of the Analytics guild; set SQL and modeling standards, run technical enablement and code reviews, and serve as the technical authority for analysts.
Scaling data infrastructure - Improve performance, reliability, cost efficiency, and governance across the dbt/Airflow/Airbyte/Snowflake stack as data volume and query load grow; optimize warehouse sizing, medallion layers, and ingestion pipelines.
What you'll do day to day:
Model and maintain semantic views that power both dashboards and AI agents, keeping definitions versioned, tested, and certified.
Build, evaluate, and iterate on Cortex Agents - including retrieval quality, guardrails, and observability.
Extend and optimize dbt models, Airflow DAGs, and Airbyte connectors across bronze/silver/gold layers.
Partner with GTM, Finance, CS, and Product stakeholders to translate business questions into governed, reusable data assets.
Run the Data Analyst guild: standards, reviews, enablement, and tooling.
Own data quality, lineage, and cost monitoring across the Snowflake platform.
Expose data and agents through Streamlit apps, BI tools (Omni), and MCP servers for internal AI workflows.

CodeValue is looking for a DevOps Engineer to join a large-scale government project in Jerusalem. The role combines Cloud & DevOps infrastructure, CI/CD, monitoring and logging, automation, troubleshooting, and infrastructure security , while working closely with development, infrastructure, security, DBA, networking, and architecture teams.

Were looking for a Hands-on AI & Data Engineering Manager to lead a team building intelligent, large-scale consumer experiences powered by AI. In this role, you will lead engineers developing AI-driven products, work closely with data scientists, product managers, and designers, and ensure that AI capabilities-from LLMs and agents to product data insights-are translated into reliable, scalable production systems. You will be responsible not only for delivering AI features, but also for analyzing product data and user behavior to continuously improve AI performance and product outcomes. This is a technical leadership role combining engineering management, architecture ownership, AI product development, and data-driven decision making.
Key responsibilities:
Lead a team of data scientists, data engineers and product analysts
Own the delivery of AI-powered product capabilities, from research and experimentation to production and operation
Drive excellence, code quality, and best development practices
Provide technical direction and hands-on guidance for complex AI systems
Drive the integration of LLMs, AI agents, and intelligent workflows into core consumer experiences
Ensure AI solutions are safe, scalable, observable, and continuously improving
Lead initiatives around product data analysis and experimentation
Analyze user interactions with product features to improve accuracy, UX, and business impact
Partner with product teams to define metrics, dashboards, and experiments that guide product improvements
Design system architectures for AI-enabled applications at scale
Evaluate and select technologies for AI platforms and data pipelines
Guide the development of prompt engineering frameworks and centralized prompt management
Ensure robust monitoring, evaluation, and feedback loops for AI outputs
Translate product and business goals into technical roadmaps and execution plans
Drive alignment between AI capabilities and measurable product outcomes.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Principal Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.
As an Principal Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.
Key Responsibilities
Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market
System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs
Ensure rapid cycles from RTL to functional stability through systematic debug approaches
Own technical blocks and drive them to completion independently
Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios
Ensure seamless hardware-software integration for AI infrastructure connectivity
Collaborate with Design and Verification teams to optimize emulation strategies.