דרושים » מדעים מדוייקים » Design Verification Engineer - Camera

In this visible role, you will be responsible for taking part of a SoC verification process of a large scale SoC.
You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. You will work closely with the design team to ensure timely delivery of quality designs.
Working with methods to accelerate verification time.

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The people who work here have reinvented entire industries with all our Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking our products.

This role is for a Design Verification Engineer who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

The position is relevant to all our sites: Herzliya, Haifa and Jerusalem.

In this role, you will be responsible for ensuring bug-free first silicon for part of the IP and are expected to: Develop detailed test and coverage plans based on the micro-architecture Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage and more.

As a Wireless Design Verification Engineer, you will be part of a team that is responsible for pre-silicon RTL verification of communication subsystems, SoC sub-systems and chip-level functionality. The activity may focus on block level, sub-system level or chip level, including end-to-end simulations of the entire data/control path. You will interact with DV methodologists, designers and communication systems engineers to develop reusable testbench and verification environment deploying the latest methodology with metric driven verification.

Description
- Own critical block and sub-system verification of wireless SoC projects.
- Architect and develop testbenches and environments, by using state-of-the-art verification methodologies.
- Define verification plan, create, simulate and debug test scenarios.
- Drive regression and coverage analysis to ensure high quality DV.
- Collaborate with design and systems engineering teams to review requirements, specifications and architecture, extract features and define DV attribute.

In this highly visible role, you will be working with the elite CPU and SOC teams which powers products that are exceptionally efficient and exceptionally performant. You will be at the center of a chip design effort interfacing with all disciplines spread across multiple geographies, with a critical impact on getting functional products to millions of customers quickly.

The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

Play a critical role in end-to-end verification of memory subsystem by developing an in-depth understanding of cache coherence protocols and functioning of various units in CPU/SOC that are relevant to memory subsystem verification. These units include Load-Store unit, different levels of caches, bus interface units, memory controller, etc.
Develop verification environment which can be used in both simulation and emulation.
Develop synthesizable transactors and test benches and support verification hooks for verifying memory subsystem functionality and CPU/SOC features.
Develop unit level stimulus as well as full chip assembly or C programs to verify memory subsystem functionality.
Develop verification IPs that can be utilized by Apple teams worldwide
Work closely with the CPU/SOC RTL spread across US and Israel to understand the specification in detail for developing verification strategy taking system level considerations into account.
Develop coverage monitors and accomplish coverage goals for closure of the design.
Develop abstract end-to-end checks to verify CPU-SOC memory subsystem interaction and coherence protocols

As a formal verification technical lead you'll work to identify targets and complete formal verification for single or multiple design blocks and IPs (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.).

Responsibilities
You will be responsible for: Working with our world-classP design engineers to develop a formal micro-architecture specification. Formalizing the refinement from architecture to micro-architecture. Developing comprehensive formal verification test plan. Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture. Crafting novel and creative solutions for verifying complex design micro-architectures. Developing and implementing re-usable and optimized formal models and verification code base. Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.

Our growing team is looking for a team player with versatile technical skills. You will engage in a cross-functional, collaborative environment that will take your debugging and technical skills to the limit while integrating cutting-edge technologies into our products.
In this role, youll be responsible for bringing groundbreaking wireless connectivity to the world through Wi-Fi, Bluetooth, and more. You will collaborate across departments to help craft wireless solutions that elevate the customer experience with our products and services.

In this role, you will be responsible for:
Work as part of a team to operate a large-scale test automation lab for our multiple products.
Test and integrate SW and HW deliveries from various global R&D teams, including managing, debugging, and failure analysis of automated tests.
Automate manual tasks for the lab and collaborate with technology teams to migrate more setups to the lab.
Constantly improve and innovate our lab procedures, HW setups, and SW tools.
This is a fixed-term position, with the possibility of extension.