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we are looking for a Senior Physical Design Engineer.
Your Impact:
You'll be part of the team, which is at the heart of software and ASIC design efforts.
You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

we are looking for a Senior Asic Design.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

Required Software Engineer, ML (Technical Leadership)
The financial risk management (FRM) machine learning principal will be the most senior machine learning engineer and strategist for financial risk. The principal will enable the risk organization to deliver significant lift over current long range objectives for friction and leakage through the generation of new Machine Learning opportunities for the organization and support of successful delivery of the risk management ML architecture. This person will partner closely with the FRM engineering leader (Director level) and be part of our risk management leadership circle.
Software Engineer, ML (Technical Leadership) Responsibilities
Address core business and technical machine learning opportunities: elevate the existing portfolio of machine learning solutions to be state-of-the-art for minimizing our financial losses (due to leakage, good revenues loss and friction). Following are a few examples of technical and business problems we aim to address. - Provide a solution for optimizing the risk machine learning model ensemble (covering the entire end-to-end advertiser funnel including detection, decisioning, enforcement and remediation) through optimization of the current model portfolio and individual models. - Minimize the impact of the prolonged financial fraud feedback loop. - Improve models measurement and performance. - Optimize data/label strategy. - Optimize balance between specific targeted model strategy and broad umbrella model strategy to optimize for short and long term benefits
Lead Research and Introduction of Advanced Technologies: - Collaborate with Financial Integrity's senior ML Engineers to lead the research and introduction of deep learning and Large Language Model (LLM) technologies. - Remain current on industry-wide advancements in ML and introduce relevant advancements in Financial Risk Management
Collaborate on Next-Generation ML Architecture: - Work closely with financial harms principals and risk management tech leads to deliver the next-generation ML architecture for our risk management system. - Collaborate with Principal ML engineers from across the company to adopt best industry and our practices within the FRM team. - Resolve or mitigate design dilemmas, balancing business and technical trade-offs. - Identify and initiate opportunities for collaboration and impact with other organizations
Identify and Initiate New Business Opportunities: - Collaborate with our FinTech, Central Integrity and Core Ads Growth partnerships to identify and initiate new business opportunities based on third-party capabilities. - Conduct proof of concept for different opportunities and initiate integrations to enhance business performance
Grow Other Senior ML Engineers - Actively invest in the growth of other senior ML engineers through goal-driven formal and informal mentorship. Provide regular feedback to other engineers regarding their technical work.

We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification at Annapurna Labs isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written.
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack.
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality.
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development.

We are seeking a highly effective Supply Chain Planner to manage a semiconductor supply chain with multiple products in close collaboration with internal and external cross-functional teams. This role encompasses both production planning and New Product Introduction (NPI) planning responsibilities.
This dynamic role requires interaction with suppliers and internal stakeholders to manage production planning, NPI launches, material movements, supplier coordination, and support for engineering/pre-production builds. The successful candidate will communicate product status and open issues, report available-to-promise, prioritize demand management, and provide strategic direction for supply chain optimization.

Key job responsibilities
Own production plans of multi production lines.
Suppliers management with daily communications providing direction.
Direct communication with customers over demand forecasts and own timely delivery commitments.
Manage NPI from concept to production - Strategic supplier selection, Balance capacity across NPI and volume production.
Plan qualifications and NPI timelines, pilot builds, BOM material availability.
Analyze constraints and present mitigation plans and status to leadership.
Develop long-term supply strategies and contingency plans.
Collect and analyze supply chain data; maintain KPIs and dashboards
Release procurement of the BOM components.
Manage materials across foundries, assembly/test houses, and contract manufacturers, Track WIP, inventory, shortages.

We are seeking a high-driven, results-oriented multidisciplinary orchestrator to act as the primary catalyst for our development infrastructure. In this role, you will operate at the critical intersection of product strategy, hardware engineering, and lab operations, serving as the connective tissue that aligns disparate teams under a unified goal. You will be responsible for driving cross-functional alignment across the organization, effectively managing stakeholders with differing ownership to ensure infrastructure roadmaps scale alongside product milestones. This position requires a self-starter comfortable pushing for success in ambiguous environments, where you will translate high-level strategy into the tactical execution of the physical and virtual ecosystems that power our development lifecycle.
Your Impact:
You will own the end-to-end lifecycle of infrastructure projects, ensuring that our Sanity Test Beds and development environments are optimized to meet aggressive product launch timelines. By bridging the gap between engineering roadmaps and infrastructure requirements, you will serve as the engine that ensures our teams have the right resources at the right time, regardless of technical or organizational complexity.

We are looking for a junior Embedded Software Engineer, to join us in building the next generation of networking products. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, fast-paced environment. Working for Annapurna Labs is thrilling and a constant learning experience. As an embedded SW development engineer, you will be responsible for developing features for Annapurna Labs next-generation hardware, to enable high network bandwidth and packets-per-seconds (PPS) performance, with consistently low latency. You will work to bring up a broad selection of instance types, optimized for various use cases, to suit each of our customers needs, such as varying combinations of CPU, memory, storage, and networking capabilities. As a SW development engineer, you will play a key role in shaping architecture definitions and SW system designs, and help to resolve complex customer issues. You will continuously evolve technically, while working to monitor AWS cloud health, maintain high quality standards, develop highly-optimized code, and provide exceptional customer satisfaction.

Key job responsibilities
We will be conducting a unique onboarding training program, where you will be studying the following with our technical experts and team leaders:
* Embedded systems basics.
* Annapurna technologies in EC2.
* Cloud compute development.
* Networking 101.

we are looking for a IC Package Design Engineer.
In this role, you will contribute to the development of complex ASIC package designs from early planning and exploration through implementation and tapeout. You will collaborate across package design, layout, SI/PI, and silicon teams to help deliver high‑speed, robust, and manufacturable package solutions.
You will participate in package architecture activities, design tradeoff discussions, and technical problem solving while growing your expertise in advanced packaging technologies and system-level integration. This role provides an opportunity to work on some of the most advanced networking silicon products in the industry within a highly collaborative engineering environment.
Responsibilities:
As a member of the Package Design team, you will:
Lead the package design activities including planning, floorplanning, pinout optimization, stack‑up definition, and high‑speed routing suport.
Collaborate with SI/PI, silicon floorplanning, layout, and manufacturing teams to ensure high‑quality package solutions.
Support package implementation activities and work closely with layout designers to ensure alignment between design intent and physical implementation.
Participate in technical investigations, design reviews, and tradeoff discussions involving performance, manufacturability, and schedule considerations.
Assist in developing and improving package design methodologies, flows, and best practices.
Contribute to debugging, issue resolution, and package bring‑up activities as needed.

We are excited to announce that the team is undergoing rapid growth, and we are looking for a C++ Software Developer.
Your Impact:
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed

We are looking for exceptional engineers to join the top-tier team developing the next generation semiconductor platform based on a revolutionary architecture. You will participate in design activities, working on the next generation of our products.

As a Chip Design Engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities:
* Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

We are seeking a Staff Systems Software Engineer to design and build the foundational infrastructure that powers products used by billions of people worldwide. In this role, you will architect and implement large-scale distributed systems, low-level platform components, and high-performance services that underpin our core product stack. You will drive technical strategy across system reliability, performance, and scalability, partnering closely with product, infrastructure, and data engineering teams to deliver systems that operate at global scale with high availability and efficiency.
Software Engineer, Systems Responsibilities
Architect and implement large-scale distributed systems and platform services that support high-throughput, low-latency workloads across our product infrastructure
Lead the technical design of systems components including storage layers, compute pipelines, networking abstractions, and service orchestration frameworks
Identify and resolve systemic performance bottlenecks through instrumentation, profiling, and targeted optimization across the full systems stack
Define and enforce service level objectives for owned systems, building dashboards, alerting pipelines, and runbooks to reduce mean time to mitigation during incidents
Drive reliability improvements by reducing failure surface, designing resilient rollout strategies, and leading regular resiliency and overload testing exercises
Collaborate with cross-functional partners across product engineering, infrastructure, and data science to align system architecture with evolving product and business requirements
Establish and evolve coding standards, architectural patterns, and engineering best practices for systems development across the broader organization
Leverage AI-assisted development workflows to accelerate design iteration, code generation, and systems analysis, applying sound judgment on when to rely on AI versus deep systems expertise
Mentor other engineers on systems design principles, debugging methodologies, and production operations, and contribute to onboarding programs for new team members
Lead incident retrospectives, identify root causes of complex production failures, and drive implementation of systemic improvements to prevent recurrence

we are looking for a ASIC Engineer.
Your Impact:
Review micro-architecture specifications
Implement Verification environment UVM based
Collaborate with Design engineers to resolve bugs and achieve coverage closure
Work with the firmware/Lab teams to verify chip flows
Perform debug, root-cause analysis, and post-silicon validation in the lab

The MLIL DataPlane team is looking for a Software Development Engineer to own the design and implementation of our inference data plane. We build the software that makes large models run efficiently on custom hardware - spanning model execution, memory management, data movement, and serving integration.
Our work covers the full inference path: integrating serving engines with custom hardware, developing high-performance compute kernels, enabling efficient data movement, and driving models from early validation through production. We operate at frontier scale with large distributed models.
This is a ground-up effort with rapidly evolving hardware and software. We need an individual contributor who can write and optimize low-level code for custom hardware, validate model architectures end-to-end, build test and profiling infrastructure, and drive performance across the stack.

Key job responsibilities
- Develop and optimize compute kernels for a custom ML accelerator architecture, targeting production-level performance for large language model inference.
- Implement and validate LLM architectures end-to-end - from PyTorch model definition through distributed execution on custom hardware.
- Integrate custom accelerator backends into open-source ML serving frameworks (vLLM, PyTorch), including scheduler extensions, memory management, and model parallelism.
- Build and maintain test infrastructure for model correctness validation across CPU, GPU, simulator, and hardware targets.
- Profile and optimize inference workloads - identify bottlenecks, instrument critical paths, and drive latency and throughput improvements from simulation through hardware bringup.
- Own features end-to-end: from design through implementation, testing, and integration into the broader software stack.
- Contribute to CI/CD pipelines that gate model and kernel changes on correctness and performance regressions.

We are seeking talented engineers to join our teams in building cutting-edge products that connect billions of people around the world. As a member of our team, you will have the opportunity to work on complex technical problems, build new features, and improve existing products across various platforms, including mobile devices and web applications. Our teams are constantly pushing the boundaries of user experience, and we're looking for passionate individuals who can help us advance the way people connect globally. If you're interested in joining a world-class team of engineers and researchers to work on exciting projects that have significant impact, we encourage you to apply.
Software Engineer, Product Responsibilities
Collaborate with cross-functional teams (product, design, operations, infrastructure) to build innovative application experiences
Implement custom user interfaces using latest programming techniques and technologies
Analyze and optimize code for quality, efficiency, and performance, and provide feedback to peers during code reviews
Set direction and goals for teams, lead major initiatives, provide technical guidance and mentorship to peers, and help onboard new team members
Architect efficient and scalable systems that drive complex applications
Identify and resolve performance and scalability issues, and drive large efforts to reduce technical debt
Work on a variety of coding languages and technologies
Establish ownership of components, features, or systems with expert end-to-end understanding.

we are looking for a Software Modeling Team Leader.
As the leader of the team, you will be responsible for delivering a state-of-the-art functional simulator for the Cisco SiliconOne family of routing and switching devices. This simulator is a critical product that streamlines the development process and significantly reduces time-to-market.
In this role, you will:
Lead and mentor and scale the team to 7-10 engineers, fostering a collaborative and inclusive environment
Oversee the design and delivery of a high-performance, reliable, and user-friendly behavioral model for Cisco SiliconOne devices
Collaborate closely with cross-functional teams including ASIC Architecture, Software, and Hardware to align goals and ensure seamless execution
Champion engineering excellence by modeling hands-on problem solving and debugging best practices
Guide team members in their professional development with tailored growth plans and regular feedback