לוח משרות דרושים מהנדסים במרכז

are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? our engineering team works on groundbreaking innovations involving crafting creative solutions for dft architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. we are looking for an experienced dft engineer to join the atpg team. the position includes taking part in development of the next generation dft technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.
 
working on the most advanced technologies and complex products, our dft solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. if you find groundbreaking technologies, and next generation products interesting, then this is the team for you. take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!
 
what youll be doing:
you will be in charge of state of the art design for TEST /atpg flows and implementation
take full atpg ownership end to end on a project, from arch & planning to pattern generation, verification and post silicon bring up and diagnosis.
inventing and maintaining automation flows that provide the short TEST time to production

we are now looking for a senior chip design rtl design engineer for the switch silicon group.
as a chip design engineer networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a combined design and verification team which develops some of the switch silicon core units.
plan and design rtl units / blocks according to arch & micro arch specifications under challenging constraints with high orientation to power, area, and performance.
build reference models, verify and simulate chip blocks/entities according to specifications.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.

looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part inflows development.

we are looking for a chip-design Verification engineer to join our switch silicon team. as a chip design Verification engineer at םור networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
work in a design and verification team that develops the Front-End design for the switch silicon and the gpu.
develop verification components and reference models, as well as verify and simulate chip blocks according to specifications under challenging constraints with a high orientation to power, area, and performance.
work closely with multiple teams within organizations such as architecture, micro- architecture and fw.

looking for a best-in-class chip design - hw emulation senior engineer to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a significant part in emulating our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. join world-class emulation team in israel. our focused team takes switches/nics/socs designs and program the emulators to behave like our silicon. are you ready to take on interesting problems and craft solutions? come check out our team.
what you will be doing:
the main responsibility is emulation and prototyping of complex chip designs. this includes defining the methodology and crafting the infrastructure needed to quickly take large chips into hardware emulation platforms.
the job also requires close collaboration with design, verification, and software engineers to enable Embedded software and application software development.
connecting emulator/fpga based solutions to real external h/w or virtual targets, taking care of complex testbench and different protocols.
this is a role for a versatile engineer that includes rtl design, verification, fpga partitioning and implementation, scripting, and lab-based bring up of the design.

our company networking system validation group is growing, and we are hiring a junior switch system Validation engineer. as a member of the team, you will take part in our core network projects which drive the growth of the company, tech and business wise. you'll gain networking and switch u-arch knowledge while helping validate, optimize, and debug devices in different areas like quality-of-service, performance, logic correctness, and ai features. 
you will work closely with logic design, circuit design, and architects to ensure successful product development with aggressive product cycles, in both pre and post silicon stages. 
you should have a good grasp of software development in different fields, such as Python scripting, Embedded software, and device firmware. it's important to have experience in a complex emulation environment and show a strong interest in creating, doing, and improving silicon validation plans. 

what you will be doing: 
work in a combined design and verification team specializing in switch full chip works
understand the switch architecture and build on  TEST plan accordingly 
develop full chip  TEST collaterals/suites, maintain regressions, debug failures and sign-off coverages 
maintain TEST suites to facility emulation and/or silicon platforms checkout as well

we are looking for an excellent virtual platform fw engineer to join the infrastructure and simulation integration group. in this role, you will integrate a systemc/tlm virtual hardware platform (delivered by the hardware modeling team) with firmware, make the end to end flow run reliably, and turn it into a productive environment for early development and regressions. with many hardworking engineers around the globe, the work environment is complex, driven by a passion for achieving goals, and fast paced. you will learn how large scale firmware projects are operated, maintained, qualified and released, and how firmware and pre-silicon platforms are developed together to accelerate product readiness.
what you will be doing:
work closely with firmware, hardware architecture, systemc modeling, and build/tools teams.
integrate firmware images with a systemc/tlm virtual platform and enable end to end boot, bringup, and feature flows.
define and implement hw-fw interfaces for the virtual platform (mmio, interrupts, dma, boot flows, configuration).
integrate the virtual platform flow into ci, regressions, and nightly qualification, including triage and failure analysis.
drive stability, scalability, and performance of virtual platform runs and regressions.
document processes, guidelines, and tooling that make the virtual platform easy to adopt across teams.

we are looking for a 100% hands-on Storage services software engineer to join the block Storage group. you will be a member of a team that builds the next generation block Storage capabilities. you will work closely with a variety of teams and architects including the networking team, and external customers. you will take part in defining the software architecture and implementation of the most advanced Storage services! services that will need to meet extreme performance and scalability demands! we have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform of tomorrow.
at our company, we work, think and learn as a team. we thrive in a deeply strong environment, and we're passionate about a culture that demands innovation and the highest standards. the rewards are sweet and include collaborating with some of the smartest people in the industry, an aggressive compensation plan that rewards top performers, and the opportunity to work on products that transform the way people work and play.
what youll be doing:
100% hands-on coding role in C language, Kernel and userspace
research, design, implement and TEST, new and existing, distributed Storage services and features of our block Storage solution, in both host and dpu environments.
acquire understanding of the algorithms, the technicalities and the interaction with other components across our block Storage ecosystem.
analyze and solve challenging bugs and customer cases in large scale production systems, identifying issues in our or inbox Kernel modules and often in other components. drive new solutions based on any issues that arise

conduct in-depth performance characterization and analysis on large multi-gpu and multi-node clusters.
study the interaction of our libraries with all hw (gpu, cpu, networking) and sw components in the stack
evaluate proof-of-concepts, conduct trade-off analysis when multiple solutions are available
triage and root-cause performance issues reported by our customers
collect a lot of performance data ; build tools and infrastructure to visualize and analyze the information
collaborate with a very dynamic team across multiple time zones

we are looking for a formal Verification engineer for our nvidia networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking switch technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies. our switch team delivers world class bridge and router solutions for hpc, data -center, network, and Storage markets. we micro-architect, verify, and deliver smart and high bandwidth multi port switches. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of core technology.
you will work on developing new formal verification methodologies and tactics.

looking for outstanding chip design Verification engineers to join our networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
come and take a significant part in designing and verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. 
what you will be doing:
join tel aviv group, working in a combined design and verification team which develops phy layer ip within the networking silicon.
build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
work closely with multiple teams within organizations such as architecture, micro- architecture, fw and post-silicon validation.

we are now looking for a senior chip design engineer to join our switch silicon team. as a chip design engineer networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art switch silicon chips. in this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! 
what you'll be doing:
work in a design/verification team which develops core units within the switch silicon.
micro-architecture of rtl verification environments planning for units and modules.
design rtl of units/blocks according to arch. specifications under challenging constraints with high orientation to power, area, and performance.
rtl synthesis, timing, supporting verification, and silicon post to activities.
work closely with multiple teams within organizations such as architecture, u-arch, full chip micro-architecture, be, and fw.

we are now looking for a best-in-class Verification engineer to join our outstanding gpu-networking silicon engineering team. as a dv engineer at gpu-networking group, you'll make a real impact in a dynamic, technology-focused company while being a part of the team that develops the flagship product of todays semiconductor industry - gpu super-chip. 
what youll be doing:
work in a dv (design verification) team that has a global responsibility over deliverable units and clusters to the silicon gpu
integrations and full-chip models
verification of chip blocks/entities according to specifications under challenging constraints
ramp-up and run dv tasks on emulation platform

we are seeking a highly motivated high-performance system architect to join our team of experts and help shape the future of high-performance and ml / ai computing. our next-generation nvl systems will be at the forefront of connecting and powering the world's most advanced compute clusters, which would be used to train the most advanced ai models such as gpt and deepseek. as a high-performance system architect at nvidia, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.
what youll be doing:
define the nvl system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).
research various of solutions to enable the next large-scale-high-performance computing clusters. the position spans over various layers from algorithms, software, firmware, and hw.
collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

we are looking for a senior chip design Verification engineer for developing the next generation dft technologies.
as a senior chip design Verification engineer in the dft team , you will verify the design and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and complex products. our dft solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for verification of the dft design, architecture and micro-architecture using sophisticated verification methodologies.
as a member of our dft verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (testbenches, bfms, checkers, monitors), execute TEST /coverage plans, and verify the correctness of the design.
collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.