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we are a world leader in 3D printing!
we are leading the global shift to additive manufacturing with innovative 3D printing solutions for industries such as aerospace, automotive, consumer products and healthcare. Through smart and connected 3D printers, polymer materials, a software ecosystem, and parts on demand, our company solutions deliver competitive advantages at every stage in the product value chain. The worlds leading organizations turn to our company to transform product design, bring agility to manufacturing and supply chains, and improve patient care.
As part of this role you will:
Provide on‑line engineering support and resolve mechanical/technical issues fast.
Improve yield, cycle time, labor efficiency, and overall production performance.
Maintain and optimize work instructions, documentation, tooling, and fixtures.
Support NPIs/EOL and collaborate with cross‑functional teams, subcontractors, and partners.
Reduce rework and scrap and lead second‑source qualifications to strengthen quality and supply resilience.

we're seeking a highly skilled Physical Design Engineer specializing in EMIR & Power Integrity to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the backend power methodologies for chips that power the world's largest AI clusters. As a Physical Design Engineer, you will be a core technical contributor ensuring the power robustness and long-term reliability of our high-performance connectivity silicon.

You will execute the Electro-Migration and IR Drop (EMIR) analysis and sign-off from block level to full-chip, working closely at the intersection of Physical Design, Analog/Mixed-Signal design, and Package Engineering. You will be responsible for validating power grid architectures to ensure our products meet aggressive voltage drop and reliability targets in advanced FinFET process nodes, directly impacting the performance and yield of chips operating in the worlds most demanding AI and cloud environments.

Key Responsibilities

Execute static and dynamic IR drop analysis, signal/power electromigration (EM) verification, and self-heat analysis from the block level through to full-chip sign-off
Implement and maintain robust EMIR flows and methodologies using industry-standard tools (Ansys RedHawk-SC, Cadence Voltus, or equivalent)
Work with Physical Design teams to implement optimal power grid structures, via pillars, and strap distributions to minimize voltage drop while maximizing routing resources
Collaborate closely with Analog/SerDes designers to analyze current profiles and ensure robust power delivery to sensitive high-speed IP blocks
Partner with Package Design engineers to perform Chip-Package-System (CPS) co-analysis, optimizing bump patterns and package routing for superior Power Integrity
Perform root-cause analysis for voltage drop violations and EM risks, proposing and implementing layout fixes alongside the PD team
Verify current density rules for ESD protection networks and ensure compliance with strict foundry reliability constraints
Support silicon bring-up by correlating simulation results with actual silicon measurements and yield data

we're seeking a highly skilled Static Timing Analysis (STA) Engineer to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the sign-off methodology for chips that power the world's most advanced AI clusters. As an STA Engineer, you will be deeply involved in the STA activities from chip partition and time budgeting through to final sign-off. You will bridge the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.

Key Responsibilities


Execute the STA flow and sign-off methodologies, ensuring our products meet rigorous timing criteria for the most demanding data center environments
Collaborate closely with Architecture, Design, DFT, and Backend teams, participating in timing reviews and working with block owners to navigate the path to sign-off convergence
Develop, optimize, and manage complex SDC constraints, ensuring they are accurate and robust across multi-scenario environments
Analyze and resolve challenges related to cross-chip clock distribution networks and apply sophisticated margining techniques to ensure robust silicon across all process corners
Participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and custom scripts to make our sign-off process faster and more efficient

As a Staff Physical STA Expert , you will hold the keys to silicon success. You will be leading the STA activities end-to-end from Chip partition, Time budgeting through signoff of all the chips we develop. You will build and lead the STA team to run several chips signoffs in parallel. In addition, You will define the sign-off methodology for chips that power the worlds most advanced AI clusters. You will act as the central nervous system of the design process, bridging the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.

Key Responsibilities

Take full ownership of the STA flow and sign-off methodologies. You will establish the rigorous criteria that ensure our products succeed in the most demanding data center environments
Collaborate closely with Architecture, Design, DFT, and Backend teams. You will lead timing reviews and work closely with block owners to navigate the path to sign-off convergence
Develop, optimize, and manage complex SDC constraints from the ground up, ensuring they are robust across multi-scenario environments
Tackle the challenges of cross-chip clock distribution networks and sophisticated margining techniques, ensuring robust silicon across all process corners
Have a passion for better workflows? Youll participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and in-house automation to make our sign-off process faster and smarter

We are seeking a Quality Engineer to ensure product and process quality across manufacturing, suppliers, and new product introduction activities. The role supports and maintains the Quality Management System, ensures compliance with applicable standards, and implements effective quality controls throughout the product lifecycle. The Quality Engineer leads root cause analysis and corrective actions, works closely with cross-functional teams, and drives continuous improvement to enhance quality performance and customer satisfaction.
Key Responsibilities
Support and maintain the Quality Management System (QMS) in compliance with ISO 9001 and applicable standards
Lead investigations of nonconformances, deviations, and customer issues, including root cause analysis and CAPA
Define and support inspection plans, acceptance criteria, and quality controls across manufacturing
Participate in New Product Introduction (NPI) activities, including design reviews, FMEA, pilot builds, and FAI
Support supplier quality activities, including issue resolution, corrective actions, and performance monitoring
Conduct and support internal and supplier audits and ensure timely closure of findings
Analyze quality data and KPIs to identify trends and drive continuous improvement initiatives
Collaborate with Engineering, Operations, Supply Chain, and other stakeholders to ensure quality objectives are met.

we're seeking a visionary Formal Verification Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the formal verification strategy for chips that power the world's largest AI clusters.

As the Formal Verification Engineer, you will be a foundational member of our Israel R&D center. You wont just execute tasks; you will define the Formal verification strategy for chips that drive the worlds largest AI clusters. You will dive deep into the technical details, proving the correctness of complex designs and ensuring they flawlessly meet specifications.

Key Responsibilities

Own and develop formal verification environments from scratch through to sign-off
Apply formal verification methodologies and strategies to prove the correctness of intricate designs
Work closely with the Architecture, Design, and DV teams to identify verification needs and pinpoint design requirements
Create robust formal environments, analyze complex RTL designs, and apply advanced formal techniques to find corner-case bugs
Analyze verification results, identify failures, and collaborate directly with designers to resolve issues efficiently
Architect and develop generic, common formal functions and properties to be reused across multiple projects

seeking a skilled and motivated Data Scientist. This individual will play a pivotal role in identifying key data points for collection, developing strategies to accumulate data and deriving actionable insights an anomaly based on a solid foundation of relevant know-how. Also, will also be responsible for creating, testing, and deploying scripts and methods for data collection and analysis to support decision-making. The Engineer will collaborate with cross-functional teams to identify critical data sources to determine the most effective data collection strategies, will develop automated and scalable data collection pipelines, will ensure data quality, integrity, and consistency across all sources and may use AI techniques to refine the results toward failures predictions.

Development of complex information systems in eMerge.
Learning and expertise in SQL and with unique internal technology.

We are seeking a highly skilled and motivated physicist/engineer to join our experimental physics group. You will play a crucial role in our quantum computing research and development efforts. You will work on the design, implementation, and optimization of novel optical cavities, as well as their integration into our quantum computing platforms. You will collaborate closely with a multidisciplinary team of physicists and engineers to push the boundaries of photonic quantum computing.
Key Responsibilities:
Develop, construct and operate optical cavities, to serve photonic quantum computing.
Communicate with external manufacturers to optimize process results.
Develop new methodologies to improve system performance.

looking for a Senior DevOps Engineer to join our growing team. This role combines expertise with deep DevOps knowledge to ensure the scalability, reliability, and efficiency of our systems. As a key member of our team, you will work closely with engineers, data scientists, and other stakeholders to design, build, and maintain robust infrastructure and services.

seeking an experienced Software Engineer to join our growing R&D team in Tel Aviv, reporting to the Engineering team manager. As part of this role you will, design, develop, and deliver high-quality, scalable, reliable, and extensible products. Work within our multidisciplinary R&D teams (Software Engineers, Linguists and NLP Research Engineers) and with the Product Management team.

This is an exceptionally exciting time to join a real AI company - when the very foundations of NLP are being redefined in front of our eyes. , youll be at the forefront of that transformation, helping to shape the next generation of AI systems that are not only cutting-edge but also deeply impactful.

As a Backend & Infrastructure Engineer, you will design, build, and operate production-grade systems that serve as the backbone of our products.

Your responsibilities will include:

Owning and evolving core backend services with a focus on reliability, performance, and scalability
Designing and maintaining infrastructure components, including cloud resources, deployment pipelines, and monitoring systems
Leading database design, migrations, and operational stability of data-intensive services
Operating and optimizing LLM/ML infrastructure, improving performance, resilience, and cost efficiency
Supporting customer integrations by building and maintaining robust inbound and outbound integration systems
Collaborating closely with Product, DevOps, and other engineers to translate product requirements into long-term technical solutions
Contributing to frontend or cross-stack work when needed to deliver complete, end-to-end features


This role is ideal for engineers who enjoy working close to infrastructure, take pride in operational excellence, and like contributing across system boundaries rather than staying narrowly scoped.

If youre looking for a place where innovation is celebrated, culture actually means something, and smart people challenge you to be better every day - our company might be exactly what youve been looking for.
What Youll Do
Own full-stack feature development from ideation to production, including architecture, implementation, testing, and deployment
Make independent tradeoff decisions, balancing speed, scale, maintainability, and user value
Collaborate across engineering, product, and design to align on priorities, timelines, and technical solutions
Working through ambiguity by framing constraints, narrowing options, and proposing actionable solutions
Deliver clear technical outcomes and help translate them into measurable business impact.