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You'll be joining our Physical Design team , which is at the center of the silicon development at Cisco. Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.

We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

We are seeking a highly skilled and experienced multidisciplinary engineer with a strong background in system design to join our team. In this role, you will contribute to our upcoming projects and play a key part in the rapid expansion of the Ethernet market.
As a such, you will be responsible for developing high-speed digital and analog circuit boards used in Ethernet products. Your duties will include designing board schematics, overseeing PCB layout, and conducting lab . Additionally, you will be responsible for evaluating new hardware solutions, providing technical leadership in troubleshooting and reviewing schematics, layouts, and design for manufacturability (DFM), as well as managing components selection.

We are seeking outstanding Electrical Engineering graduates from top universities to join our Electrical Compliance team and gain hands-on experience with cutting-edge networking technologies and best-in-class ASIC interfaces.
Responsibilities
Operate and maintain test equipment for compliance and validation processes.
Perform switch platform testing to ensure reliability and performance.
Work with advanced ASIC interfaces, including Ethernet, PCIe, USB, SPI, UART, I2C
Assist in troubleshooting and analysing electrical compliance issues.
Collaborate with senior engineers to improve testing methodologies.
Career Growth Opportunities
Gain real-world experience in compliance testing and hardware validation.
Learn from industry-leading engineers and expand your technical expertise.
Build skills in automation, data analysis, and advanced networking technologies that are highly valued in the industry.
What We Offer
Exposure to state-of-the-art networking technologies.
Opportunity to work on real-world compliance challenges.
Mentorship from industry experts.
Learn from the best and build the future of networking
Ready to launch your career? Apply now and start building the future with our company.
Please attach your gradesheet.

We are seeking a highly skilled and motivated Electrical Validation (EV) Engineer and System Production/Testing/ATE Engineer to join our team. This position is crucial in supporting the design EV, development, and implementation of Automated Test Equipment (ATE) and production test systems.
The Electrical Validation Manager leads the electrical validation function across our company hardware platforms. This role owns validation strategy, methodology, lab infrastructure, and execution across all high-speed and control interfaces. The manager ensures robust electrical performance from early prototypes through production release and drives cross-functional alignment between design, SI, firmware, and manufacturing.
The role involves close collaboration with R&D, Quality, DevOps, and Contract Manufacturing (CM) teams to ensure the delivery of high-quality, reliable products.
Key Responsibilities
Define the electrical validation strategy for our company hardware platforms.
Own validation methodology for: High-speed Ethernet (100M-1600G), PCIe Gen1 to Gen5+, SerDes architectures (NRZ/PAM4), Control and management buses (I2C, SPI, RS-232, MDIO, etc.)
Establish structured validation plans aligned with hardware release milestones.
Build and manage a high-performance validation team.
Define lab architecture including: Equipment selection (oscilloscopes, BERTs, analyzers), Compliance platforms, Automation frameworks, Signal integrity validation environments
Drive early engagement with board design and SI teams to ensure design-for-validation.
Oversee: Compliance (IEEE, PCI-SIG, OIF), Interoperability testing, Stress and margin testing
Lead root cause analysis of electrical failures and systemic issues.
Support NPI, manufacturing bring-up, and yield improvement.
Develop automation and scalable validation methodologies.
Define validation documentation standards and sign-off criteria.
Collaborate with system architecture and software teams to ensure HW-SW integration robustness.
Manage external labs and certification processes where required.
Drive continuous improvement of validation coverage and efficiency.
Lead the full ATE development lifecycle from requirements definition to execution in production, including GUI design and Python scripting.
Develop and maintain boundary scan applications using JTAG Technologies.
Define and maintain test fixtures, including JIGs/Bed-of-Nails, etc. in collaboration with mechanical vendors.
Implement full test traceability systems for production yield and stability monitoring.
Collaborate with R&D and Quality teams to drive product quality and reliability improvements.
Provide onsite support at CM sites, including station setup, installation, training, maintenance, and debugging.
Perform in-depth failure analysis and troubleshooting at the system and component level.
Utilize and maintain a range of test equipment, including:
Work with various communication protocols: TCP/IP, Telnet, SSH, HTTP, SNMP, SFTP, SCP, FTP, RS232, GPIB, I2C, NI-VISA.
Support testing of embedded systems running on Linux platforms.

This is a high-impact technical leadership role designed for a "star" engineer who can own the entire hardware lifecycle. You will be responsible for stabilizing products from the first prototype through mass production, defining validation strategies, and managing the technical deployment of test stations at global Contract Manufacturers (CMs). You will bridge the gap between R&D, manufacturing, and field reliability to ensure world-class product quality.
Core Responsibilities
Outsourced Station & Vendor Management: Lead the design, setup, and qualification and scale-up of test stations (ICT/JTAG/FT) and debug infrastructure at CM/Outsource partners.
End-to-End Product Stabilization: Own the hardware stabilization process from the first build unit through ramp-up and transition to high-volume production.
Validation & Automation Strategy: Build comprehensive validation plans, review hardware designs for testability (DFT), and integrate automated software tests into production lines.
Advanced System Debugging: Develop hardware debug tools and methodologies to perform deep-dive failure analysis and root cause investigations on systemic issues.
Yield & Data Intelligence: Monitor and optimize yield performance using data analysis techniques to identify trends and failure modes during the NPI lifecycle.
Field & RMA Ownership: Lead technical investigations into field-deployed systems, analyzing diagnostics and telemetry to evaluate RMA claims and provide actionable engineering recommendations.
Cross-Functional Leadership: Collaborate with Mechanical NPI, Test Development, R&D, and manufacturing partners to align test requirements with business needs.
Statistical Process Control (SPC) Implementation: Establish and monitor SPC for critical manufacturing parameters to identify process "drifts" before they result in actual product failures.
Root Cause Corrective Action (RCCA): Lead the formal RCCA process for any manufacturing escapes, ensuring that the "fix" is implemented both in the hardware design and the test software.
Vendor Quality Engineering (VQE): Act as the technical quality lead for CMs and outsourced station builders, defining the "Golden Unit" standards and qualification protocols for all production lines.

We are looking for an experienced system engineer to participate and lead the development of a radio-based drone detection and mitigation system as part of the company products.

Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication protocols.
Develop and optimize algorithms for scanning, signal separation, antenna selection, etc.
Define requirements and guide other multi-disciplinary teams (SW, Modem algorithms, DSP, and FPGA) through implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like MATLAB, Python, Excel, and other log analysis software.
Gain a deep understanding of the full system to guide and support development, testing and validation teams.

We are looking for a talented communication PHY algorithms engineer to join our growing, highly motivated, and skilled modem research team, to lead and participate in research of proprietary wireless communication signals and design modulators, demodulators as part of our counter-drone cyber-based product.
Responsibilities:
Research and analysis of proprietary air interface: algorithm research of sampled wireless signals using MATLAB or Python, to define all radio characteristics including sample rate, modulation scheme, error corrections, spreading techniques and more.
Full modem implementation and simulation in MATLAB or Python.
Guide and support the FW, DSP and FPGA teams for concept implementation and debug.
Analysis and debug of PHY algorithms behavior and performance improvements.

Antenna system and RF engineer that will primarily lead antenna system design, testing and system verification from concept to production.
The position is part of the RF R&D team and will require in addition RF board design and testing.
Responsibilities will range from initial concept stage up to production including concept verifications, guiding mechanical design, final product approval including outdoor testing and transfer to production.
The designs require multi discipline knowledge in antennas, antenna arrays, mechanics, RF and system considerations
The job requires collaboration with the system, electrical, mechanical, software, manufacturing, and system test engineers to ensure successful product design and transition to production.

We are looking for a highly skilled RF Test Automation Developer to join our R&D Integration Automation team.

This role is focused on designing, developing, and maintaining advanced automation solutions across unit, integration, system, and end-to-end testing levels.

The ideal candidate is a hands-on developer with strong expertise in Python and Pytest, experienced in building and executing automated tests, and comfortable working with modern CI/CD pipelines and automation tools.

The Senior Developer will act as a technical mentor and key contributor, ensuring best practices are followed and test automation is seamlessly embedded into the development lifecycle.

Knowledge of RF systems is a strong plus.

Key Responsibilities:
Develop and maintain automated RF test development tools using Python and other relevant programming languages.
Configure, calibrate, and operate RF test equipment such as Vector Signal Generators (VSGs), Spectrum Analyzers (SAs), and related instruments.
Create and validate RF test setups for performance validation, debug, and system characterization.
Analyze test results, generate comprehensive reports, and present findings to cross-functional teams.
Collaborate with hardware and software engineers to integrate automated RF testing into the product development cycle.
Stay current with emerging RF technologies and testing methodologies, proposing and implementing improvements to existing test processes.
Contribute to the development of RF testing strategies aligned with R&D goals and product roadmaps.
Research and introduce innovative RF automation tools, frameworks, and workflows aligned with R&D goals.

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

The Opportunity We are starting a new ML/AI organization directly reporting to the CTO, to pioneer next-generation capabilities for our industry-leading defense systems. As a Founding ML-Engineering Lead, you will be the technical cornerstone of this initiative. This is a high-impact role designed for a practitioner who seeks total technical ownership of the machine learning lifecycle. You will be responsible for taking novel AI projects from initial concept through data collection, design, implementation, and evaluation, all the way to deployment.

The Technical Challenge Our ML initiatives span a diverse technical landscape. You will lead projects that range from field-oriented applications, where high accuracy and reliability are paramount, to research-oriented tools and agentic workflows designed to enhance our R&D capabilities and accelerate complex data analysis. Working in deep collaboration with our R&D teams, you will leverage unique, proprietary data to solve problems at the forefront of the counter-drone industry.
What You Will Do:
End-to-End Ownership: Lead the full technical execution of ML projects, ensuring every stage-from data acquisition to deployment-meets our rigorous standards.
R&D Collaboration: Partner closely with R&D departments to design data collection strategies and integrate ML-based tools and agents into their specialized workflows.
Versatile Implementation: Develop models and intelligent systems for a variety of use cases, ranging from real-time field performance to autonomous research-support tools.
Technical Authority: Act as a founding voice for ML implementation and strategy within the CTOs office.

Role responsibilities:
Final tests technician (Hands-on) in Production line.
Manage HW testing in production, Line setup, Calibration and Maintenance.
Deep HW knowledge in RF & Digital.
Functional testing of electronic circuits according to specifications.
Overall responsibility for debug & analysis in boards & System level.
Responsibility repair, analysis and documentation.
ATE stations technical support.

our companys innovative processors are designed into the advanced cellular systems of most tear-1 carriers .
We are looking for an experienced and creative Verification Engineer to join our Processor Verification Team.
In this role, you will be responsible for verifying the core units of our next-generation processors. You will work closely with the architecture and design teams to ensure functional correctness through advanced verification methodologies, taking ownership of verification environments from planning to coverage closure.

We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
our Impact
As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

About the group:
We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.