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Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The our company System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Designing and implementing SOC level clock requirements
Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks
Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.

We are now looking for a Power Optimization and Analysis Engineer! our company prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units power efficiency; you will be responsible for researching, developing, and deploying methodologies to help our company's products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of our company Switches product line.
As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for our company's next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.
What You'll Be Doing:
Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.
Develop and share best practices for performing pre-silicon power analysis.
Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.
Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.
Select and run a wide variety of workloads for power analysis.
Prototype new architectural features in Verilog and power analysis.

our company Networking BU is looking for Senior Software Program Manager that will be responsible for software programs and projects. The PM should drive planning and execution of FW/SW projects while aligning with corporate priorities and constraints.
our copmpany Mellanox Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer best-in-class solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, big data and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. Our product line is focusing on delivering the most optimized Ethernet solutions for industries like Media and Entertainment as well as any other industry that can benefit from our Datastream and TCP/IP acceleration.
What you'll be doing:
You will manage the networking software programs for our company next generation AI Data centers
Responsible to coordinate between all project stakeholders such as marketing, engineering teams in IL and around the world, operations, etc. from initial requirements definition through Architectural stage, execution, and delivery.
Develop and execute feature planning and prioritization of perception capabilities to meet the software programs' needs
Identify risks, gaps, and bottlenecks in time, and find resolution with technical leaders and project management
Work with product managers, architects, and engineers to ensure consistency with company strategy, commitments, and goals.

we are looking for a Senior Project Manager to join the Israeli Networking Cluster Solutions group. The project manager will be responsible for the definition, planning and execution of multidisciplinary projects for building our company's clusters in Israel. Direct communication with Architecture, R&D, Operations, Finance, IT, Security, and all relevant stakeholders within and outside of our company. Accountable and responsible for the success of the relevant Cluster build programs.
What youll be doing:
Own entire activities associated with planning and executing projects for building large Clusters for our company in Israel
Co-work with our company teams on different disciplines associated with building large scale clusters Data-Center Engineering, Data-Center Operations, Corporate-IT, Planning, Finance and more
Manage periodic sync meetings within our company and with external stakeholders to track and monitor projects meetings
Present project status to our company senior executive team
Matrix management of internal teams and resources for successful execution of projects and activities.

We are now looking for a Senior Hardware Quality Engineer. The Quality and Reliability Engineer will provide leadership and management for the quality function and sustain the quality philosophy for the organization. Establish, maintain and optimize an effective quality management system. Create and implement a quality plan to achieve the levels of quality established through organizational goals, customer expectations, and related partners. Enhance and improve products by working towards problem-solving tools, prevention methods, quality-at-the-source and continual improvement techniques. Management Representative for Quality Systems.
What youll be doing:
The following description of work to be performed by this individual is not intended to be all-inclusive. Rather, it focuses on the major tasks that must be accomplished.
Develop and implement department goals and key measures that align with the mission, vision and values of the organization, design, develop and lead quality assurance processes and methods.
The Engineer will be responsible for customer quality issues and entering them into the corrective action database, working with QnR members and other managers to resolve quality issues as requested or required by customers.
Ensure the organization is maintaining adherence to quality control plans and processes, maintain and enhance product design development, verification and validation processes, to allow high quality of adapters and systems products throughout the entire product life cycle.
Partner with Continuous Improvement to drive Quality process improvement initiatives to reduce customer complaints and internal scrap including developing and coordinating department project planning.

our company Networking IC Product Engineering team is looking for a senior System Validation engineer, to take part of Networking system validation and characterization efforts of different platforms and products. You will be a part of a team working on groundbreaking technology. We are in need of hardworking and motivated engineers ready to define and lead validation activities. Do you have system approach, have passion for lab work, data analysis and post-Si hands on problem solving? We will be happy to have you on our team!
We are looking for a skilled and experienced Engineer with a focus on System level Validation to join our Engineering team in Yokneam, Israel. As part of this role, you will play a crucial role in ensuring the quality of our sophisticated products. You will collaborate closely with PHY design, system HW architecture and companywide system, validation, reliability, signal integrity and testing owners to devise and implement effective validation strategies, aligning with our high-quality standards.
What youll be doing:
Create and implement system level validation plans for new products.
Analyze and interpret validation results to identify potential issues.
Collaborate with design and architecture teams to define required validation and optimize and solve electrical/SW/FW/ functional issues.
Work closely with software and firmware teams to ensure seamless integration.
Provide technical expertise and guidance for team members.
Drive coverage gap analysis and closure between system level (L6) to Server-Level Assembly (L10) and Rack level (L11).
Take active part of optimization of HSIO traces, to meet the specifications for system performance.
Work with SERDES engineers by sharing plans and guidance for high-speed routings testing, data analysis, extensive debug.
Investigate technically complicated bugs and help drive debug efforts across various teams.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The company System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.
In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Lead the end-to-end execution, tracking, and convergence of chip-level CDC and RDC for complex SoCs across all IPs and partitions.
Plan and orchestrate CDC/RDC signoff: define methodology, scopes, run plans, constraints, and acceptance criteria.
Run and maintain CDC/RDC flows and rule decks, including multi-mode, multi-clock, and hierarchical signoff.
Triage violations efficiently: root-cause to RTL, constraints, tool setup, or IP models; prioritize and drive fixes to closure with owners.
Verify reset architecture and RDC robustness (reset domain intent, release sequencing, glitch detection, fanout).
Author and review CDC/RDC constraints, waivers, and justifications; ensure auditability and signoff quality.
Automate runs, report parsing, dashboards, and KPIs for closure tracking using scripting and data tooling.
Partner with RTL, DV, DFT, STA, PD, and Architecture to align fixes, manage ECOs, and protect CDC/RDC quality during late design changes.
Define and enforce signoff gates; communicate progress and risks with clear metrics and issue tracking.
Continually improve methodology and training to prevent recurring CDC/RDC issues and accelerate convergence.

our company has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its a unique legacy of innovation thats fueled by great technologyand amazing people. Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
At our company Networking, we are driven by innovation and excellence. Our team in Israel is looking for a dedicated Chiplet STA owner to join us in defining the next era of AI's networking. This is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. If you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!
What you'll be doing:
Perform advanced Static Timing Analysis (STA) for HSIO at chiplet and FC level.
Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

we are looking for an excellent Firmware Design Engineer for our company FW PHY Group. The person will closely work with our company FW development, architecture, chip design teams and gain deep understanding of our company's Networking products and technologies.
We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!
What youll be doing:
Enabling new SerDes and Optical Technologies
Implement FW functionality in signal processing units of our company products
Work closely with the architecture, HW, and SW design teams
Define implement and maintain FW algorithm to control the Silicon
Develop and test FW on emulation & simulation environments during the Pre-silicon phase
Debug and screen HW/FW/SW issues
Take an active part in silicon bring-up and SW development phases
Lead data-driven discussions about the product functionality and areas for improvement.

we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.

We are now looking for a Principal Formal Verification Engineer to join our our company Networking team!
As a Principal Formal Verification Engineer in our companys Networking Business Unit, you will play a critical role in shaping the formal strategy and execution of complex, high-performance silicon designs that power data centers, AI infrastructure, networking, and storage systems. This is a senior technical leadership role, requiring deep hands-on experience and a strong execution mindset.
You will join a passionate and expert team responsible for applying formal methods to validate designs at the highest level of rigor. This role offers the opportunity to work at the cutting edge of formal verification, influence architecture, and collaborate across functions to drive best-in-class silicon quality.
What Youll Be Doing:
Define and execute advanced formal verification strategies for complex digital blocks and systems.
Lead formal activities across multiple projects, ensuring scalability, completeness, and convergence .
Guide the development of formal testbenches, properties, assertions, and coverage models.
Collaborate with architects, RTL designers, and DV teams to identify formal targets and maximize design verification efficiency.
Provide technical leadership and mentoring to other formal engineers and contribute to the growth of formal expertise within the organization.
Evaluate and deploy state-of-the-art formal tools, flows, and methodologies to continuously improve formal verification coverage and impact.

We are now looking for a Formal Verification Manager to join our company Networking team!
As a Formal Verification Manager in our companys Networking Business Unit, you will lead a team of highly skilled formal engineers responsible for verifying the next generation of our companys cutting-edge Network products and GPU technologies.
This is a unique opportunity to make a real impact at the heart of our companys AI and HPC revolution, while working in a fast-paced, innovative environment.
You will be part of a passionate and experienced team using leading formal verification tools and methodologies to ensure design correctness at the highest level. Your work will influence key architectural decisions and help deliver world-class silicon solutions for data centers, high-performance computing, networking, and storage applications.
What Youll Be Doing:
Lead and grow a team of formal verification engineers focused on pre-silicon Formal verification of complex digital designs.
Define and drive formal verification strategies and methodologies to prove the correctness of designs across multiple projects.
Collaborate closely with Architecture, Design, DV teams to identify verification needs and drive closure.
Provide technical guidance, mentoring, and support to engineers in the team.
Own the planning and execution of formal verification deliverables to ensure high quality and timely tapeouts.

we are seeking a Hardware & System Development Manager to join our System Product Engineering organization. In this role, youll own the creation and optimization of advanced test and validation platforms for our companys high-performance networking products. These platforms power both R&D-level validation and mass production testing, ensuring exceptional product quality, reliability, and scalability.
At our company, we push the boundaries of whats possible in computing and networking. We believe that innovation thrives in an environment of teamwork, ownership, and technical excellence. We value ambitious thinking, thorough execution, and a shared commitment to creating exceptional products.
Were looking for a board design leader with deep technical expertise and a passion for leading teams, driving end-to-end solutions, and fostering multidisciplinary collaboration. Join us and be part of a team thats shaping the future of networking technologies!
What Youll Be Doing:
Lead the development of test hardware platforms, including customized test boards and system-level infrastructure.
Own the full hardware lifecycle from definition and schematic design to bring-up and production deployment.
Deliver hardware used across R&D and manufacturing for functional, performance, and reliability testing.
Collaborate with Mechanics, Signal Integrity, Layout, DFT, Firmware, and Production teams to achieve seamless integration.
Drive technical execution, project schedules, and cross-site coordination with precision and clarity.

We are looking for an experienced Firmware System Engineer to deliver reliable solutions for safe Firmware releases to our Next AI Gen product lines.In this role, you will work closely with engineering, product, and architecture teams to bring up advanced our company network and AI products and silicons, ensuring a smooth and secure Firmware release process for mass production.
The dynamic and fast-paced work environment will require you to excel in problem-solving and system-level debugging, all while fostering collaboration among exceptional engineers across our company's global sites.
What youll be doing:
Identify, diagnose, and addressing high-value problems during the product onboarding process, such as software compatibility, PCIe, security, network interoperability and communication issues between components
Verify that all integrated components interact as intended. This includes functional testing to ensure software components work correctly on various hardware testing platforms
Validate firmware features for production at hardware power-on stage
Bridge between software, architecture, HW and production engineering teams.

we are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
You will be developing physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs.
Work closely with block owners, full Chip STA engineers to assure high quality and timely convergence.
Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.
Additional responsibilities include participating and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification across multiple projects.