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Imagry is looking for an electrical, software, electronics, or mechatronics practical engineer to perform testing, integration, and upgrades on autonomous vehicles. The role includes work from our Haifa office as well as field activity in Nahariya and around the world. Responsibilities: You will be responsible for implementing software and hardware systems in autonomous vehicles and buses, identifying and reporting faults, and working closely with integration and software teams. This is an opportunity to join the forefront of the global autonomous driving industry and gain hands-on experience working with advanced systems and testing capabilities in real field conditions with real vehicles (not just simulations).

DRS RADA is a global pioneer of radar systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance . We are looking for an experienced Repair Lab Manager with a strong background in managing repair operations for military electronic products in both RMA/field-return and serial production environments. Key Responsibilities:
* Manage repair lab operations for military electronic products, including both RMA returns and serial production repairs.
* Lead and supervise teams of repair engineers, assemblers, and soldering technicians.
* Oversee troubleshooting, fault isolation, repair, rework, and verification activities for electronic boards, modules, and systems.
* Ensure efficient handling of returned units, production failures, and ongoing repair priorities.
* Coordinate closely with Engineering, Manufacturing, Quality, Supply Chain, and related functions.
* Monitor repair performance, turnaround time, yield, and quality metrics.
* Support root cause analysis and implementation of corrective and preventive actions.
* Ensure compliance with internal procedures, quality standards, workmanship requirements, and traceability needs.
* Drive continuous improvement in repair processes, workflow, and lab efficiency.
* Maintain a safe, organized, and technically capable repair environment.

Power the Future with us! At SolarEdge (NASDAQ: SEDG), we're a global leader in smart energy technology, with over 3,000 employees, offices in 20+ countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. SolarEdge offers amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. The Integration Engineer will develop, perform and analyze System Validation tests and will take part in the system review processes, with an understanding of the market requirement, system design, and the end user’s expectations. What will you be doing?
* E2E responsibilities for SolarEdge system, and product validation and experiments.
* Plan and execute HW & SW system integration tests.
* Understand and study the System operation edges, and system design edges.
* Plan and design manual and script automation tests of SolarEdge Product



Country:
Israel

City:
Herzliya

The company EyeC VLSI team designs cutting-edge chips for RADAR systems used in ADAS and autonomous vehicles and is looking for an experienced DFT Engineer.
This is a unique opportunity to join a team of top-tier engineers working with the most advanced technologies to develop Autonomous Vehicle (AV) SoCs. Every engineer in our team plays a broad and diverse role, taking on significant responsibilities, being involved in critical development stages, and making a direct impact on the success of our projects.
What will your job look like:
You'll be responsible for the architecture of DFT solutions across the SOC (MBIST, SCAN, ATPG, LBIST and more).
Develop all the necessary RTL for the different modules.
Verify and Validate your design in GLS.
Develop ATPG to the highest requirements of Functional Safety (ISO26262).
Debug and analyze coverage and yield loss.
Support production activities and Si debug.

As a Silicon Engineering Manager you will be responsible for improving silicon-photonics yield and performance through data-driven analysis, cross-functional collaboration and proactive issue resolution.

You will serve as the key interface between R&D, Process and Production teams, ensuring efficient data flow, rapid issue identification and continuous process improvement across wafer fabrication, device testing, and packaging stages.

Responsibilities
Perform silicon process and chip-level data analysis, establishing correlation between chip and wafer performance.
Lead process debug and yield loss analysis at chip/wafer level, driving root cause investigations and corrective actions.
Manage engineering approval forum to release production material.
Collaborate closely with vendors to implement new product tests and resolve technical/process issues.
Act as a key interface between design, testing, and production teams, ensuring alignment across the product lifecycle
Oversee and coordinate the transfer of data related to silicon design, testing, fabrication, and characterization between Production and R&D departments.
Develop and implement data management strategies to ensure data accuracy, security, and accessibility.
Maintain proper documentation of data transfer protocols, version control, and data integrity checks.
Support data analysis efforts to improve silicon performance, yield, and quality.
Ensure compliance with company policies and industry standards related to data security and confidentiality.

our company's Automated Driving group in Haifa is looking for an experienced DFT Engineer.
This is an exciting opportunity to join a team of highly talented engineers, working on one of the most cutting edge technologies - Autonomous Vehicle (AV) SoC.
At our company's Automated Driving group, we know that the idea of a fully autonomous car is no longer science fiction, but a reality that we are creating!
We have spent more than 15 years developing the world's most Advanced Driver Assistance Systems (ADAS) and we are now leading the computer vision and machine learning domain, reaching fully automated driving experience (AV).
What will your job look like:
Develop all the necessary HW / FW / SW for the different modules
Verify and Validate our design
Debug and analyze coverage and yield loss
As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts - as it required by the Automotive and Safety related products market (ISO26262).

we are looking for an Emulation Engineer to join our Radar VLSI team and drive the development of next-generation ASIC Sensors.
We are developing best-in-class automotive radar solutions to complement our companys autonomous driving platform. Joining our expert team, you will leverage our companys unique assets to work on cutting-edge technology in a dynamic and challenging environment.
What will your job look like?
In this role, you will build high-end Emulation environments based on new designs. The position involves building and integrating complex components, working with cross-functional engineering teams, and developing systems that will change the way we drive.
We are looking for an engineer who thrives on challenges and is committed to engineering excellence while navigating complex constraints.
Lead Emulation development for the VLSI team.
Work closely with SW, Logic, and Verification engineers.
Serve as an expert matter for your domain, with full responsibility for driving and implementing improvements and new ideas.

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

The Road Algorithm team is responsible for one of the most critical and challenging tasks in autonomous driving - detecting and understanding the drivable road. Our work leverages Deep Neural Networks and geometric modeling to deliver reliable and high-quality road perception for autonomous vehicles.
We are looking for an Expert Deep Learning Research Engineer who will both drive independent deep learning research and collaborate closely with other developers to help unlock new directions, solve complex challenges, and elevate the teams algorithmic capabilities.
What will your job look like:
Conduct hands-on research and development of deep learning algorithms for road understanding, drivable area detection, and scene structure modeling
Lead exploratory investigations into new architectures, training strategies, and data utilization methods
Join forces with other developers to troubleshoot difficult problems, introduce new ideas, and guide technical decisions
Own projects end-to-end - from concept and experimentation to integration and scalable deployment.

The Road Algorithm team is responsible for one of the most critical and challenging tasks in autonomous driving - detecting and understanding the drivable road. Our work leverages Deep Neural Networks and geometric modeling to deliver reliable and high-quality road perception for autonomous vehicles.
We are looking for an Expert Deep Learning Research Engineer who will both drive independent deep learning research and collaborate closely with other developers to help unlock new directions, solve complex challenges, and elevate the teams algorithmic capabilities.
What will your job look like:
Conduct hands-on research and development of deep learning algorithms for road understanding, drivable area detection, and scene structure modeling
Lead exploratory investigations into new architectures, training strategies, and data utilization methods
Join forces with other developers to troubleshoot difficult problems, introduce new ideas, and guide technical decisions
Own projects end-to-end - from concept and experimentation to integration and scalable deployment.

We are seeking a talented and motivated R&D Physicist to join our company.

In this role, you will be responsible for designing and carrying out experiments for SiPh chip performance and characterization, performing and analyzing laboratory experiments of chip level optical systems assembly, and developing and managing setups for photonics and laser devices characterization. In this roll you will be required to travel abroad for demonstrations and exhibitions as needed.

Responsibilities
Design and carry out experiments for SiPh chip performance and characterization.
Perform and analyze laboratory experiments of chip level optical systems assembly.
Develop and manage setups for photonics and laser devices characterization.
Provide technical support to the R&D team for experiments and data analysis.
Contribute to the development of new testing methodologies and techniques.
Ensure adherence to experimental protocols and safety procedures.
Maintain laboratory equipment and supplies.

Which department will you join?
Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for a Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

We are looking for a Full Time Lab Technician to join our R&D team.

This is a full-time position with two evening shifts per week are required from 17:30-23:30.

Responsibilities

Identify and work with laboratory equipment, tools, supplies, and materials.

Maintain the lab area and equipment in a safe and organized manner.

Perform basic lab equipment maintenance as scheduled and in accordance with lab/equipment manual specifications.

Perform multiple concurrent tasks at several different equipment stations to maintain acceptable job flow.

Read, comprehend, and follow technical manuals and protocols.

Fill out all assigned reporting forms in a timely manner.

Read and interpret prescription specifications.