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We are looking for a ASIC Modeling Architect Engineer.
What You'll Do:
You'll join our architecture team, central to silicon development.
You will define features of future devices using the latest silicon technologies, focusing on Logic Design and coding.
You will be responsible for defining the device specification.

We are looking for a IC Package Design Engineer.
What You Will Do:
As a member of the Package Design Team, you will:
Lead package design tasks, being responsible for planning, coordinating with partners, and driving schedules from start to finish.
Optimize package pinouts, stack-ups, placements, power distribution, and high-speed routing while balancing functional needs, manufacturing constraints, and performance considerations.
Collaborate with silicon floor plan, signal integrity (SI), and power integrity (PI) teams to ensure design quality and efficiency.
Work closely with layout editors to implement the package design, ensuring alignment with high-speed signal and functional interface requirements.
Enhance design methodologies and procedures, collaborating with vendors and developers to improve product quality and design efficiency.

We are looking for a PHY Validation Engineer.
What You'll Do:
Youll be joining the post silicon validation team in PHY system group Silicon One group as part of the silicon development .
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

Join the team in developing a unified silicon architecture for web-scale and service provider networks.
the team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, café, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide.
Your Impact:
Define devices and deliver specifications to other development teams.
Work with internal and external customers to understand and define current and future requirements.
Innovate at all levels to deliver market-first features and solutions.
Conduct in-depth research to shape the architecture of next-generation networking devices.
Contribute to full-chip integration and cross-functional collaborations to enhance design methodology.
Participate in the definition and analysis of networking system solutions, ensuring they meet market and technical needs.

We are looking for a Signal Integrity Engineer .
As a Signal/Power Integrity Engineer, you will play a key role in ensuring the performance and reliability of our high-speed SerDes IP, covering silicon, package, and board-level analysis. You will collaborate across multiple fields, including analog design, silicon integration, PCB & package design, and mechanical engineering.
Provide implementation guidelines and feedback to silicon, package, board, and system design teams.
Design and simulate high-speed SerDes signals and perform co-simulation of package and PCB in HFSS.
Conduct feasibility studies, design verification, and sign-off processes, including lab correlation.
Perform Power Distribution Network (PDN) analyses, including model generation and time-domain simulation.
Work closely with backend, package, and board design teams for bump-out and ball-out optimization.
Drive chip-package-PCB co-design of SerDes at 112Gbps and beyond, ensuring signal and power integrity best practices.

We are looking for an Analog Engineer.
As an Analog Design Engineer, you will:
Design and develop high-speed analog/mixed-signal circuits for industry-leading CMOS process nodes.
Lead all design stages, from architecture definition to final layout sign-off.
Perform circuit simulations, analysis, and debugging to ensure robust performance and reliability.
Collaborate with system architects, digital designers, and layout engineers to optimize circuit performance, power, and area.
Engage in post-silicon validation, debugging, and optimization to enhance circuit functionality.

Join the Silicon One PHY System Team, a key part of our silicon development. You'll be at the forefront of defining, implementing, and validating advanced PHY and system solutions for next-generation network devices.
Your responsibilities will include:
Defining features for future devices utilizing cutting-edge silicon technologies.
Developing and optimizing PHY firmware and calibration processes.
Driving system-level definitions, operations, and post-silicon validation.
Collaborating with cross-functional teams to ensure high-quality deliverables.

We are seeking for an Integration and Verification engineer. We are looking for a skilled Integration and Verification engineer to perform functional testing, system integration, and field trials of complex multi-disciplinary systems including RF, hardware, firmware, and software. This role requires hands-on experience with lab equipment, strong troubleshooting capabilities, and the ability to lead field tests and provide Technical Support to customers. A full time on site position, based in Holon, Israel.
Key Responsibilities:
* Perform integration and verification testing of systems and subsystems (HW/SW/FW/ RF )
* Operate TEST equipment (e.g., Spectrum Analyzer, Signal Generator) and develop TEST automation scripts
* Lead field tests, including TEST setup design, documentation, and Real-Time troubleshooting
* Deliver technical demonstrations and training (OJT) to customers, both in Israel and abroad

Involvement in all stages of development of multidisciplinary systems. Implementation of Control and Signal Processing algorithms over DSPs/MCUs. Performance Analysis, loop shaping and parameter adjustments for complex systems. Performing experiments and troubleshooting, supporting mechanical and electronic design, and Participating is systemic design reviews.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Own the special chiplet STA, analyze the timing results, verify correctness and provide budget for the different partitions.

Generate the timing constraints for the STA and the P&R flow.

Be exposed and work on a variety of exciting designs (including high cell count and high frequency), resolving complex timing and congestion problems.

Help to shape clock tree, and effect the work of the different teams (Front end, DFT & BE).

Daily work involves all aspect of STA & chip design: take part in SDC generation & review, actively running & analyzing STA tools, guiding the group during chip closure process, etc'.

Taking part inflows development.

Take part in ramping up new breaking technologies.

We are now looking for a Senior Chip Design Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of rtl verification environments planning for units and modules.

Design RTL of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

We are looking for a Formal Verification Engineer for our Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch and GPU technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies that are in the heart of th AI revolution. Our team delivers world class Chips solutions for HPC, AI infrastructures, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. we have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.

You will take part in the AI revolution led by us, working on cutting edge architecture.

Our HW team in Israel is looking for an experienced board designer to join the Hardware Switch Group. The team leads the development of networking infrastructure for our next-generation data centers focusing on accelerated performance while enabling optimized end to end GPU connectivity. We are looking for a collaborative team player, who enjoys working closely with cross-functional teams to drive innovation in networking solutions.

What you'll be doing:

Lead Pioneering Switch System design from concept to mass production.

Collaborate and integrate with all HW project fields: Board Design, Mechanics, Thermal, PCB Layout, Production, Software/Firmware, RTL and more.

Project decision maker - Technical focal point.

The position consists of product specification definitions, electrical schematics, component selection, layout guidance, hands-on testing in a lab environment, accompanying production and qualification processes.

We are looking for a highly qualified chip design engineer with a strong background in ASIC design to join our Chip Design Methodologies & Shared Code team. This team is responsible for developing best in class design methodologies, actively seeking for the best methods to develop design, developing shared code, providing design guidance, and driving the adoption of new technologies. It plays a key role in ensuring chip design teams operate efficiently and adhere to best practices. This role offers a great opportunity to think innovatively and make a significant impact within a dynamic, technology-focused organization.

As a Principal ASIC Design Methodologies Engineer, you will:

Develop and implement groundbreaking ASIC design methodologies that ensure flawless execution.

Drive exploration and adoption of next-generation tools, techniques, and workflows to meet the evolving demands of advanced semiconductor design.

Lead strategic initiatives aimed at redefining design practices, bringing cutting-edge methodologies to the forefront of the organization.

Collaborate with cross-functional teams to drive ambitious projects from concept to completion.

Influence and mentor other engineers, encouraging a culture of excellence and continuous improvement.

Ensure that the networking chip design team operates with maximum efficiency and the highest possible quality.