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Imagry is looking for a Jr. Application Engineer with tons of motivation to join our office in Haifa, Israel. You will be responsible for the entire car and bus software / hardware testing pipeline, issues reporting, and team communication. This is a great opportunity to work at the forefront of the exciting autonomous driving industry, as the position involves features testing in the real world. Most of your workday will be spent in the autonomous car or bus and involves some physical work. This is not an office position!!! You will be required to travel and reside abroad periodically to support long-term projects. Responsibilities: 1. Manage software test cycle, including: running test scenarios, configuration management, and code debugging. 2. Report the main software / hardware car and bus issues to the appropriate engineer. This requires an understanding of the technology, the aptitude to pinpoint the source of a problem, and the ability to determine the person responsible for fixing it. 3. Overall car and bus physical maintenance, including verification that the cameras in the car and/or bus are clean. 4. Maintenance of all computers and hardware within the car and bus. 5. Participation in driving demos for visitors, including describing the product to the visitors.

Job Description: Accountable for V&V teams short-term and long-term deliverables. The team leader is responsible for: Verification plans, execution follow-up and verification summaries, while ensuring all requirements testing coverage. > Enabling efficient teamwork (planning, monitoring, coaching, supporting, removing road-blocks) Reviewing various product designs, for Technical Support in agile testing methods and during formal verification. Debugging system failures and issues found during testing, for helping the developers in focused investigation.
Determine and manage the testing environments and tools.
Work closely with development teams and part of program core team Non-hybrid, full-time position at Matam, Haifa and Tirat Carmel sites

As a SW student you will take part in developing state of art features for innovative products and cutting edge technology in the automotive cybersecurity domain. You will also have a chance to work with an excellent group of experienced engineers.

As a SW student you will take part in developing state of art features for innovative products and cutting edge technology in the automotive cybersecurity domain. You will also have a chance to work with an excellent group of experienced engineers.

This role is for a Design Verification Engineer who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

At Apple, we work every single day to craft products that enrich peoples lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an exceptionally talented Design Verification Engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apples customers every single day.

The position is relevant to all Apple sites: Herzliya, Haifa and Jerusalem.

In this role, you will be responsible for ensuring bug-free first silicon for part of the IP and are expected to: Develop detailed test and coverage plans based on the micro-architecture Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage and more.

As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and show progress towards tape-out.

In this role, you will work as part of a Research and Development team, building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will use design and verification expertise to verify digital designs. You will be responsible for the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or verify designs with stored value accounts and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Provide close coverage measures to identify verification holes and show progress towards tape-out.