Requirements:
BSc or MSc in Electrical or Computer engineering
7+ years of hands-on experience in validation or HW/SW debug, including the use of advanced lab equipment (Scope, BERT, etc.)
Hands-on experience with test automation development or FW development or automated data analysis
Strong debugging and advanced analysis experience
Experience in Signal/Power Integrity design- An advantage
Experience with analog circuits or PHY IP knowledge - An advantage
Strong sense of ownership, commitment, and responsibility
Good interpersonal communication skills.

Requirements:
BSc or MSc in Electrical or Computer engineering
3+ years of hands-on experience in validation or HW/SW debug, including the use of advanced lab equipment (Scope, BERT, etc.)
Hands-on experience with test automation development or FW development or automated data analysis
Strong debugging and advanced analysis experience
Experience in Signal/Power Integrity design- An advantage
Experience with analog circuits or PHY IP knowledge - An advantage
Strong sense of ownership, commitment, and responsibility
Good interpersonal communication skills.

Requirements:
B.Sc degree in Electronic Engineering, or experienced practical engineering degree
3+ years of proven experience in a high-speed electro-optical test engineering role.
Strong problem-solving, debugging, and analysis with examples to prove it. basic SW debug abilities.
Strong collaborative and interpersonal skills, with an ability to successfully guide and influence.
Experience with establishing complex lab setups using various high-speed lab optical equipment (Fast O/E & E/O converters, Optical spectrum analyzer, etc.) as well as electrical (oscilloscopes, VNA, spectrum analyzers, traffic generators, etc.)
Ways to stand out from the crowd:
Deep understanding of technology and passion for what you do.
Experience in customer technical support Experience with industry specifications such as IEEE/OIF etc.
Hands-on experience in lab measurements with an emphasis on high-speed electro-optical designs
Familiar with optical assembly designs/components (high-speed optical cables/lasers/diodes). Basic scripting skills (Python, Matlab).

Requirements:
BSc or MSc degrees in EE or equivalent experience from known universities.
At least 5+ years of work experience in RTL design, Gate-Level and Circuit design optimization.
Deep understanding of logic optimization techniques and PPA trade-offs.
Excellent interpersonal skills and ability to collaborate with multiple teams.
Excellent problem solving and debugging skills.
Ways to stand out from the crowd:
Prior experience in RTL design (Verilog), verification and synthesis.
Clock IPs profound knowledge: PLL, DLL, Compensator.
Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a bonus. Prior experience in implementing on-chip clocking networks.

Requirements:
BSc in electrical engineering, computer engineering or computer science
10+ years of experience working in verification environment, tests, and test bench development (C/C++/SV)
TestPlan defining and Coverage-Driven Verification experience
Fullchip/SOC verification experience, strong system understanding
3rd-party IPs integration testing experience
Waveform debugging with the latest EDA tools, root-cause bugs independently
Knowledge in Industry Standard protocols such as AXI/OCP/APB
SW embedded experience, C/C++ skills - Advantage
Strong skills in scripting Perl/Python - Advantage
System Verilog writing skills, preferably in OVM/UVM Advantage.

Requirements:
B.SC./ M.SC. in Computer Engineering /Electrical Engineering/Communication Engineering or equivalent experience
5+ years of proven experience in Design Verification.
Deep knowledge in HDL (Verilog/VHDL)
Familiarity with the different verification tools and methodologies.
High-Level English
Ways to stand out from the crowd:
Validated experience in ASIC Verification.
Knowledge in Specman.
Knowledge in SimVision.

Requirements:
Technical Competencies:
A good understanding of HAV platforms and infrastructure (e.g. Strato, Primo or proFPGA enterprise-level systems would be preferable).
A good understanding of HAV compilation and runtime flows (e.g. Veloce or VPS would be preferable).
Practical insights into the application and usage of HAV.
Knowledge of design mapping, testbench mapping and pre-silicon validation.
Familiarity with HAV debug solutions (probes, waveforms, assertions, coverage, etc.).
Knowledge of virtual TestBench eXpress (TBX) and/or In-Circuit Emulation (ICE) use-cases.
Proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification.
Strong background in functional verification, RTL synthesis, design partitioning and place-and-route.
Conversant with SoC design and architecture concepts.

Desirable Competencies:
Familiarity with data center hosting and cloud-based solutions.
Knowledge of standard interface protocols such as AMBA, PCIe, DDR, etc.
Commercial awareness of EDA companies and solutions.
Linux, Tcl/Python/shell, C/C++, DPI, SCE-MI, SystemC, UVM Connect, UVM Framework.
Simulation using Questa Sim and Visualizer.
Background in consulting or other customer services subject area.

About You:
BSc/MSc qualified in Electronic Engineering, Computer Engineering or Computer Science.
Team player and individual contributor.
Lateral thinker and problem solver with a pragmatic approach.
Excellent communication and presentation skills.
Outgoing and enthusiastic personality.
Happy to learn new technologies and methodologies when needed.
English language mandatory, other European languages beneficial.
Ability and willingness to travel including rights to work onsite within EMEA.

Requirements:
A bachelors degree in electrical engineering or computer engineering
5+ years of relevant experience in verification of complex designs.
Proficient in System-Verilog and UVM methodology.
Good interpersonal skills. And team player.
Ways to stand out from the crowd:
Background with crypto RTL units (AES, RSA, PQC)
Experience working on Risc-V or Risc-V peripherals
Experience working in a diverse and global environment (working with engineers from China, India, and the US).

Requirements:
BSc in electrical engineering, computer engineering, or computer science
8+ years of experience working in verification environment, tests, and test bench development (SV/UVM/C/C++)
System Verilog writing skills, preferably in OVM/UVM
SW embedded experience, C/C++ skills
TestPlan defining and Coverage-Driven Verification experience
3rd-party IPs integration testing experience
Waveform debugging with the latest EDA tools, root-cause bugs independently
Skills in scripting Perl/Python - Advantage
Knowledge in Industry Standard protocols such as AXI/OCP/APB - Advantage.

Requirements:
B.SC./ M.SC. in Computer Engineering /Electrical Engineering/Communication Engineering or equivalent experience
5+ years of proven experience in Design Verification.
Deep and vast experience with System-Verilog UVM.
Deep knowledge in HDL (Verilog/VHDL)
Familiarity with the different verification tools and methodologies.
High-Level English
Ways to stand out from the crowd:
Validated experience in ASIC Verification.
Knowledge in System-Verilog UVM.