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we are seeking a highly technical, partner-facing Integration Engineer to join our Network team. In this role, you will be the primary technical driver for onboarding partners to the Network and maintaining quality and product excellence with existing partners.
You arent just following a manual; you are a technical consultant, a troubleshooter, and a bridge builder. You will work closely with R&D, Product, and Business, ensuring that every provider integration is seamless, secure, and scalable.
What Youll Do:
Own the Integration Lifecycle: Lead partners from initial discovery through to production go-live, serving as their dedicated technical Point of Contact.
Act as Tier 1 R&D: Deep-dive into the code to answer complex architectural questions. Youll debug, write code, analyze API logs, and solve technical hurdles.
Bridge the Gap: Translate business needs into technical requirements. Youll help partners understand how to map their existing infrastructure to our protocol.
Collaborate Cross-Functionally: Work hand-in-hand with Product to relay feedback from the field and with Business to ensure the providers commercial goals are met.
Scale the Process: Develop technical documentation, tools, and integration best practices to streamline the onboarding process and making it more intuitive.

We are looking for a Chip Design Verification engineer to join our Verification team! This is your opportunity to have an impact on the design of millions of computers sold worldwide each year by leading brands.
The role includes: - Building complex verification environments - Meeting the challenges presented by state-of-the-art design - Continues professional growth using the most advanced tools and methodologies - Use AI for improved productivity

As a Senior AI Engineer on the Guardian Agents team, you will develop both our autonomous "digital employees" that execute security programs and the Control Plane that governs them. You will build a platform that allows customers to calibrate agents through conversation, ensuring human feedback is transformed into persistent organizational knowledge. By engineering these closed-loop systems, you enable agents to learn, evolve, and deliver accurate, goal-driven security outcomes at scale.
What Youll Do:
Architect Autonomous Agents: Build goal-driven agents for complex security tasks like false-positive reduction and automated triage.
Build the Control Plane: Develop the infrastructure for Human-in-the-Loop (HITL) feedback, natural language calibration, and stateful memory systems.
Engineer for Growth: Implement evaluation frameworks and "organizational memory" to ensure agents stay accurate and follow historical security precedents.
Bridge AI & Engineering: Collaborate in a "Core Pod" with Security Researchers and Data Scientists to turn raw security signals into scalable, productized agent behaviors.
Scale Data Pipelines: Integrate agents with Big Data foundation to ensure real-time context and tenant-safe execution.

We are looking for a Senior DSP Software Engineer who will lead design and implementation of our innovative signal processing algorithms on the industry cutting-edge target platform, consisting of embedded cores, DSPs, and dedicated accelerators.
What will you do:
Perform analysis, design, implementation and validation of innovative MIMO imaging radar algorithms for next generation ADAS and autonomous
vehicles on our target platform
Participate in SW architecture design and perform signal processing algorithm porting & optimization
Address real-time constraints in a challenging memory/compute bound framework
Be part of a goal-oriented workgroup and dynamic research & development environment
Work in close collaboration with CTO and SW architecture team

We are looking for a Senior RT Embedded Engineer to join our design and development team, responsible for the full-cycle development of an innovative 4D imaging radar for the automotive sector. You will take a lead role in design and implementation of real-time software for a multi-core automotive SoC platform, consisting of embedded cores, DSPs and dedicated accelerators.
What will you do?
Be part of full-cycle development of embedded SW for innovative automotive radars
Take a lead role in embedded system SW design and implementation on the industrys cutting-edge embedded SoC
Integrate the teams SW over the real-time embedded controller. Bring SW to validation readiness to the validation team. Bring SW to the test vehicles
Specify and balance system-SW requirements to achieve the run time restrictions of the compute platform
Work in collaboration with the CTO and Algorithms team

We are looking for a RT SW Developer.

we are seeking for a Verification engineer. We are seeking a highly skilled Verification engineer to join a Processor Verification team working on nextgeneration processor cores. In this role, you will take a key part in verifying critical processor blocks, collaborating closely with architecture and design teams to ensure functional correctness. You will own verification activities endtoend from TEST planning and environment development to execution, coverage analysis, and closure- using advanced verification methodologies.

The role includes development of Automated TEST Equipment (ATE) TEST stations, including digital tests and RF tests. The engineer will be responsible for TEST system development from the requirements definition stage through delivery of the TEST system to the customer and its maintenance. The role also includes technical characterization and definition of project documents such as SPEC, SOW, TRD. Education Required: Bachelors degree in Electrical Engineering.

'abra' means creation. Therefore, our goal is to lead the information systems market and to create relevant and precisely adapted technological solutions to the business needs of our customers. We are looking for an Chief Information Officer (CIO) / Information Systems Manager to lead all digital, technological, and IT operations across the municipalities in the regional cluster. This role includes strategic leadership, digital transformation, management of IT infrastructure, cybersecurity oversight, staff management, vendor relations, and driving innovative digital services for residents. The position requires high responsibility, professional independence, and the ability to work closely with senior municipal leadership. Key Responsibilities:
* Lead the overall IT and digital strategy for the municipalities, including planning, policy development, and execution.
* Manage IT infrastructure, cybersecurity, networks, servers, backups, and ensure business continuity and disaster recovery readiness.
* Oversee the implementation of digital systems, manage budgets, and lead technological and smart?city projects across the cluster.
* Direct and support IT staff including technicians, network administrators, and Help Desk teams, ensuring high?quality service and operational stability.
* Manage tenders, vendors, and suppliers while ensuring compliance with SLAs, organizational procedures, and municipal needs.

In this role, you can lead our teams to deliver fully functional "first silicon" IP designs, from defining initial constraints through high-quality tape-out. You will have the rare and rewarding privilege of crafting upcoming products that will delight and inspire millions of customers every single day.
Responsibilities
Own the entire IP-level netlist generation and timing convergence journey, from synthesis and UPF power intent to final sign-off.
Architect and manage complex timing constraints (SDC) for both standard and custom designs, ensuring sign-off quality from day one.
Drive Full Chip and block-level timing/noise convergence, including hierarchical timing flows and power optimizations.
Collaborate closely with RTL designers to understand clock architecture, DFT teams on mode constraints, and PNR teams to achieve flawless physical convergence.
Develop and support automated block and chip-level sign-off flows, working with CAD teams to shape cutting-edge methodologies that eliminate pessimism and accelerate convergence.
Perform deep-dive signal integrity (SI) and noise analysis, drive custom IP integration, and generate block-level budgets to ensure correlation with the Full Chip.

This is a highly visible role where you will own the physical design cycle at the partition, IP, and Chip levels-enabling us to produce fully functional "first silicon" designs. Do you love working on challenges that no one has solved yet? If you are ready to join the world's leading engineers and work with state-of-the-art design flows, come join our group.
Responsibilities
You will be responsible for all phases of pre-silicon development, from initial definition to high-quality tape-out (Netlist to GDSII).
Lead block-level Place & Route (PnR), complex floor-planning, partitioning, and the creation of power domains and grid specifications.
Develop and validate high-performance, low-power clock network guidelines and distribution.
Drive static timing closure (STA), Physical Verification (DRC/LVS), and Electrical/Power analysis (EM, IR-Drop, Xtalk, and Noise).
Participate in establishing CAD and physical design methodologies for "correct-by-construction" designs and assist in flow development for chip integration.
Generate and implement ECOs to fix timing, noise, and EM/IR violations while meeting strict area and power constraints.
Work closely with logic design teams on SoC architecture and HDL (Verilog) to implement timing fixes and design optimizations.

Appdome’s mission is to protect every mobile app in the world and the people who use mobile apps in their lives and at work.
Appdome provides mobile brands with the only patented, centralized, data-driven Mobile Cyber Defense Automation platform, delivering rapid no-code, no-SDK mobile app security, anti-fraud, anti-malware, anti-cheat, anti-bot implementations, configuration as code ease, Threat-Events™ threat-aware UI/UX control, ThreatScope™ Mobile XDR, and Certified Secure™ DevSecOps Certification in one integrated system.
With Appdome, mobile developers, cyber and fraud teams can accelerate delivery, guarantee compliance, and leverage automation to build, test, release, and monitor the full range of cyber, anti-fraud, and other defenses needed in mobile apps from inside mobile DevOps and CI/CD pipeline.
Leading financial, healthcare, m-commerce, consumer, and B2B brands use Appdome to upgrade mobile DevSecOps and protect Android & iOS apps, mobile customers, and mobile businesses globally. Today, Appdome's customers use their platform to secure over 50,000+ mobile apps with protection of over 1B mobile end users projected.
We are seeking a driven and results-oriented Account Executive to join our team. In this role, you will focus on acquiring new customers, building trusted relationships, and driving revenue growth by understanding prospects’ mobile business and security objectives and aligning them with our solutions.
The ideal candidate is a proactive communicator with strong interpersonal skills and a solid technical foundation. You excel at managing complex enterprise sales cycles and thrive in a dynamic environment that demands collaboration across teams and effective engagement with stakeholders via phone, email, and in-person interactions. About The Position We are looking for a talented Mobile Fraud Engine to join Appdome. In this role, you will develop sophisticated fraud detection and prevention components that operate at the core of our mobile threat intelligence platform — diving into signal processing, risk evaluation logic, and real-time decision-making, and translating your findings into robust, production-ready code. This position is ideal for developers who want to understand how fraud happens and use that knowledge to build innovative solutions that protect millions of mobile applications worldwide. Job Description
* Design, develop, and maintain core fraud detection and risk-scoring components within mobile apps.
* Investigate fraud patterns and mobile threat signals to develop innovative detection and prevention mechanisms.
* Own the collection of threat and device signals used by risk assessment algorithms to perform device and user behavioral profiling.
* Design systems that make split-second decisions, balancing security accuracy with user experience.
* Continuously explore emerging fraud trends and incorporate new detection techniques into our product.
* Collaborate with a multidisciplinary team of engineers, data scientists, and security experts to deliver end-to-end solutions.

we are looking for a Hardware Lead Engineer.
As HW Lead Engineer, in the Nitro team, you will be responsible for defining Annapurna Labs Smart Network Interface Card (NIC) design, leading development and validation cycles, and bringing the product to healthy mass production.
Youll provide leadership in new technologies, bringing them to large-scale deployment, in a continuous effort to deliver a world-class customer experience. We offer a fast-paced, intellectually challenging position, where youll work with technical experts, senior leaders, covering multiple technologies. We are changing the industry, and looking for individuals who are ready for this challenge and want to reach beyond what is possible today.
Key job responsibilities:
- Define the architecture and design specifications of next generation K2 Nitro Cards.
- Own full product life cycle, engage with design partners and manufacturing sites to enable high-yield mass production.
- Lead the analysis and debugging of complex design, manufacturing, and integration challenges.
- Continuously design for process optimization to improve product quality, simplify workflows, and accelerate the Nitro card development lifecycle.