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We are looking for a Generative AI Engineer to lead our AI efforts end-to-end - from infrastructure and production systems to internal adoption and cross-team enablement.
You will play a significant role in building the world's first Consumer Therapy AI Product (someone said RAG? But we mean a real one that works in production...).
This is a critical role in a high-growth, fast-paced B2C startup, requiring a leader who can advocate for Engineering requirements, tech-debt and best practices while promoting a product-mindset and putting our customers front and center.
About You:
You are a great human being and youre all into teamwork. you care about how people will feel inside the organization and set high standard for culture, professionalism and maturity.
A Doer, hands-on, biased for action and not taking an advisory role. Know how to translate challenges into actions. Able to work both individually and manage multiple priorities while driving others around you for action.
You're a fast learner, jack of all trades, feel comfortable in a fast paced, ever-changing environment. You can break down complex problems into steps and plot clearly how to get from A to Z while having the ability to zoom out and see the bigger picture.
You are an experienced hands on engineer, with proven experience with Developing LLM based products, with a real passion to AI and LLM, eager to learn about very new model and technology in this domain, and have a real understanding of the AI ecosystem

Our team at the Huawei Computing Network Innovation Lab is looking for exceptional talent to join us and lead the development of next-generation data centers. We create cutting-edge technologies that synergize software and hardware in tandem to accelerate compute, storage, and networking at large scale. We aim to drive innovation and deliver software-defined infrastructure and algorithms for HPC, AI/ML, and Big Data applications.
We are looking for an outstanding Research Team Lead with deep hands-on expertise in large-scale distributed systems, AI framework infrastructure, and performance optimization on custom accelerators. If you are a visionary technical leader, a skilled communicator, and a team builder who thrives at the frontier of systems and AI research - you're welcome on board.

What Will You Be Doing?
Lead and grow a world-class team of researchers and engineers working on distributed AI infrastructure and systems software.
Architect and own the software infrastructure enabling distributed training and inference on Huawei's custom accelerator hardware (e.g., Ascend NPU).
Drive research and development on communication libraries, runtime systems, memory management, and graph execution & synchronization at scale.
Optimize end-to-end performance across large-scale clusters, covering both scale-up (multi-device) and scale-out (multi-node) configurations.
Design and implement high-performance communication backends and collective operations (AllReduce, AllGather, broadcast) for distributed training workloads.
Collaborate cross-functionally with hardware architects, compiler teams, and framework engineers to co-design hardware-software solutions.
Publish and present research findings at top international venues (NeurIPS, EuroSys, SC, MLSys, OSDI) and represent the team externally.
Mentor engineers and researchers, conduct performance and growth reviews, and shape team culture and technical direction.
Partner with top academic institutions and open-source communities to advance the state of the art in distributed AI systems.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

*Part-Time or Full-Time Opportunity

In this job opening, we are seeking a highly motivated and visionary researcher to join our team focused on chiplet-based computing systems. This role involves research and development in chiplet-based architectures, aiming to overcome performance and scalability limits of traditional compute platforms.

Responsibilities:
Conduct cutting-edge research on the co-design of communication and computation for wafer-scale systems. On the communication side, the work focuses on architecting Networks-on-Chip, providing scalable, high-bandwidth, and ultra-low-latency interconnects that efficiently span multiple dies and support fine-grained data movement. On the computation side, the research emphasizes optimizing and mapping training and inference workloads to fully exploit wafer-scale resources, improving performance, scalability, and energy efficiency through intelligent task placement and scheduling.
Investigate various aspects of system design, including:
Network-on-Chip design, further including Topology exploration, routing algorithms, and protocol/flow-control design to support high-throughput collective communication, low-latency synchronization, and efficient model/data parallelism
Expressing and Mapping LLM Parallelism to Wafer-Scale System that simplify LLM parallelism (e.g., tensor, pipeline, and data parallelism) and efficiently map training and inference workloads onto wafer-scale system

We are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!

As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.

What Youll Be Doing
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

We are looking for an experienced Tech Lead to lead a team of 3-5 software engineers developing innovative database security and data protection solutions for enterprise platforms.

This is a hands-on technical leadership role focused on cybersecurity, data security, and advanced software engineering. The successful candidate will combine deep security expertise with strong software architecture skills to define technical direction, lead engineering execution, mentor developers, and build enterprise-grade security solutions.

The role requires strong technical ownership, the ability to solve complex security challenges, and close collaboration with security researchers, product teams, customers, and engineering organizations. Occasional travel may be required for technical discussions and customer engagements.

Responsibilities
Lead and mentor a team of 3-5 software engineers, providing technical guidance and driving engineering excellence.
Define software architecture, technical strategy, and development direction for database security products.
Design and develop advanced cybersecurity and data security solutions for enterprise environments.
Lead security architecture discussions, technical design reviews, and code reviews.
Translate complex security requirements and research concepts into practical, scalable software solutions.
Drive secure software development practices across architecture, design, implementation, and deployment.
Solve complex technical challenges related to security, reliability, scalability, and performance.
Collaborate with security researchers, product management, and cross-functional engineering teams.
Participate in customer-facing technical discussions and occasional international travel.
Remain hands-on and contribute to critical software components and technical decisions.

We are looking for a Principal Engineer with deep expertise in database internals, system architecture, and hardware-aware performance optimization.
This role is responsible for defining and driving advanced database performance solutions by understanding and improving the interaction between database engines, operating systems, and modern hardware architectures.
The ideal candidate is an experienced technical leader with a strong background in database systems, performance engineering, and computer architecture. The candidate should be capable of leading complex technical initiatives, influencing architectural decisions, and developing innovative solutions for next-generation database platforms.
This is a hands-on technical leadership role requiring expertise across database kernels, query execution, transaction processing, memory systems, and low-level performance optimization.

Responsibilities
Define and drive technical direction for database performance optimization and hardware-aware database architecture.
Lead the design and implementation of advanced database optimizations focused on scalability, efficiency, and workload performance.
Solve complex performance challenges across the full system stack, including database engines, query execution, transaction processing, concurrency control, storage engines, operating systems, and hardware platforms.
Design and develop optimizations leveraging modern hardware architectures, including multi-core CPUs, large-memory systems, NUMA platforms, CXL memory, RDMA networking, and advanced storage technologies.
Improve database execution engines, caching mechanisms, memory management, storage systems, and workload scheduling.
Analyze system behavior and identify bottlenecks using profiling, tracing, hardware performance counters, and low-level performance analysis.
Develop benchmarks, workload models, and methodologies to evaluate scalability, efficiency, and architectural tradeoffs.
Collaborate with database kernel, infrastructure, and engineering teams to influence architecture decisions and deliver high-impact improvements.
Mentor senior engineers and contribute to building technical expertise across the organization.
Drive innovation through research, prototyping, technical analysis, and architectural improvements.

We're backed by tier-1 global VCs, led by second-time founders, and already deployed with organizations operating at serious scale. AI is not a feature here - it's the system.
We're hiring a Senior AI Engineer to design, fine-tune, and operate AI agents and large-scale models in production. This role exists because off-the-shelf models aren't enough for the problems we're solving.
If you enjoy pushing models until they break - and then fixing them - keep reading.
What you'll do:
Design and operate AI agents that reason, act, and collaborate with humans
Fine-tune and adapt large language models for:
Behavior analysis
Reasoning over long, messy timelines
High-precision enterprise workflows
Build agent orchestration systems (tool use, memory, planning, feedback loops)
Run large-scale inference and training pipelines in production
Work on model evaluation, drift detection, and continuous improvement
Optimize for latency, cost, and reliability at real enterprise scale
Partner closely with DevOps, security, and backend engineers - no research silos
Ship models that are auditable, explainable, and safe in sensitive environments

We are hiring a GenAI Engineer to join a team building and delivering real-world generative AI solutions - systems that move beyond prototypes and into production, where real users rely on them every day.
You'll take complex problems from the first customer conversation through to a working system running in their environment. You'll build GenAI solutions that are deployed, used, and relied upon - not just demos or experiments.
The problems are unusual, and the constraints are real: on-premise and air-gapped deployments, strict data handling requirements, and complex customer environments. A meaningful part of your work will happen on-site with the people who use the systems you build.
What you'll do:
Build end-to-end GenAI systems: RAG pipelines, agentic workflows, document understanding, and extraction from messy real-world data.
Own the full lifecycle - from data pipelines and model/prompt design to evaluation, deployment, monitoring, and the critical work of making systems reliable and production-ready.
Define what success looks like for each use case, measure performance, and stand behind the results.
Work directly with customers on-site, translating their needs into practical technical solutions.

A fast-growing technology company focused on delivering high-quality, scalable products through innovation, automation, and engineering excellence. We are looking for an experienced C# Automation Developer to design, develop, and maintain robust automation solutions, contribute to our automation strategy, and drive quality across complex systems and applications.
Responsibilities:
Design, develop, and maintain automation frameworks using C#
Define and implement automation strategies for Web, API, and backend systems
Build scalable, maintainable, and reliable automated test infrastructures
Collaborate closely with Development, Product, DevOps, and QA teams
Perform code reviews and enforce automation best practices
Improve CI/CD pipelines and integrate automated testing processes
Analyze test results, identify quality gaps, and drive continuous improvement
Mentor automation engineers and promote engineering excellence.

We are looking for an ATE Engineer to join our multidisciplinary team in central Israel.
The role involves developing and implementing complex automated test solutions, from requirements analysis through direct integration with hardware and Automated Test Equipment (ATE).
Key Responsibilities:
Translate Test Requirements Documents (TRD) into automated Test Sequences/Scenarios using NI TestStand or OTM (ORION).
Develop, maintain, and enhance automated test sequences and deploy them in laboratory environments.
Integrate measurement instruments and communication protocols with ATE systems, perform debugging, and support troubleshooting activities.
Develop software components and DLLs in C# or C for hardware communication, when required.
Work closely with Hardware, Electronics, and Integration teams, including reading and interpreting electrical schematics.

Semi Conductor Devices (SCD), a worldwide leader of high-end Infrared Detectors and thermal video cores, is seeking a Senior Digital VLSI Engineer to participate in the definition, design, verification, implementation, and silicon validation of next-generation infrared image sensors. Responsibilities • Be part of a team defining future Image Sensor Digital controller Architecture • Participate in the digital design and verification effort of state-of-the-art IR Image Sensors, working closely with the Analog designers and Board designers (internal and external interfaces) • Take part in ASIC development lifecycle (pre- and post-silicon) – from Spec definition to block-level design, full-Chip till Silicon Validation in the laboratory and customer support • Lead the design and integration of complex digital blocks from specification to silicon • Drive VLSI innovation and integration of new technologies into projects and activities in the design organization